From patchwork Thu Mar 19 15:16:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 6050541 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 509DA9F2A9 for ; Thu, 19 Mar 2015 15:16:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6EDB220519 for ; Thu, 19 Mar 2015 15:16:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 77896203C0 for ; Thu, 19 Mar 2015 15:16:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 661046EAB8; Thu, 19 Mar 2015 08:16:22 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [87.106.93.118]) by gabe.freedesktop.org (Postfix) with ESMTP id 6C7766EAB8 for ; Thu, 19 Mar 2015 08:16:20 -0700 (PDT) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from nuc-i3427.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 37929280-1500048 for multiple; Thu, 19 Mar 2015 15:16:45 +0000 Received: by nuc-i3427.alporthouse.com (sSMTP sendmail emulation); Thu, 19 Mar 2015 15:16:15 +0000 Date: Thu, 19 Mar 2015 15:16:15 +0000 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Message-ID: <20150319151615.GQ10812@nuc-i3427.alporthouse.com> Mail-Followup-To: Chris Wilson , intel-gfx@lists.freedesktop.org, Daniel Vetter References: <20150312091743.GT3800@phenom.ffwll.local> <1426158677-26261-1-git-send-email-chris@chris-wilson.co.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1426158677-26261-1-git-send-email-chris@chris-wilson.co.uk> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: Daniel Vetter Subject: Re: [Intel-gfx] [PATCH v3] drm/i915: Optimistically spin for the request completion X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Mar 12, 2015 at 11:11:17AM +0000, Chris Wilson wrote: > This provides a nice boost to mesa in swap bound scenarios (as mesa > throttles itself to the previous frame and given the scenario that will > complete shortly). It will also provide a good boost to systems running > with semaphores disabled and so frequently waiting on the GPU as it > switches rings. In the most favourable of microbenchmarks, this can > increase performance by around 15% - though in practice improvements > will be marginal and rarely noticeable. > > v2: Account for user timeouts > v3: Limit the spinning to a single jiffie (~1us) at most. On an > otherwise idle system, there is no scheduler contention and so without a > limit we would spin until the GPU is ready. > > Signed-off-by: Chris Wilson > Cc: Daniel Vetter Just recording ideas for the future. Replace the busy-spin with monitor/mwait. This requires Pentium4+, a cooperating GPU with working cacheline snooping and that we use HWS seqno. diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 85e71e0e2340..454a38d4caa3 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -37,6 +37,7 @@ #include #include #include +#include #define RQ_BUG_ON(expr) @@ -1187,18 +1188,42 @@ static int __i915_spin_request(struct drm_i915_gem_request *req) unsigned long timeout; int ret = -EBUSY; + if (ring->irq_refcount) /* IRQ is already active, keep using it */ + return ret; + intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); timeout = jiffies + 1; - while (!need_resched()) { - if (i915_gem_request_completed(req, true)) { - ret = 0; - goto out; - } + if (this_cpu_has(X86_FEATURE_MWAIT)) { + do { + unsigned long ecx = 1; /* break on interrupt */ + unsigned long eax = 0; /* cstate */ - if (time_after_eq(jiffies, timeout)) - break; + __monitor((void *)&ring->status_page.page_addr[I915_GEM_HWS_INDEX], 0, 0); + if (need_resched()) + break; + + if (i915_gem_request_completed(req, true)) { + ret = 0; + goto out; + } - cpu_relax_lowlatency(); + if (time_after_eq(jiffies, timeout)) + break; + + __mwait(eax, ecx); + } while (1); + } else { + while (!need_resched()) { + if (i915_gem_request_completed(req, true)) { + ret = 0; + goto out; + } + + if (time_after_eq(jiffies, timeout)) + break; + + cpu_relax_lowlatency(); + } } if (i915_gem_request_completed(req, false)) ret = 0;