From patchwork Fri Oct 30 16:14:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 7528111 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3212C9F37F for ; Fri, 30 Oct 2015 16:14:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3926A207B9 for ; Fri, 30 Oct 2015 16:14:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5E46020573 for ; Fri, 30 Oct 2015 16:14:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F10B6ECF8; Fri, 30 Oct 2015 09:14:29 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-f41.google.com (mail-wm0-f41.google.com [74.125.82.41]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4AAA86E0F6 for ; Fri, 30 Oct 2015 09:14:25 -0700 (PDT) Received: by wmeg8 with SMTP id g8so15619114wme.1 for ; Fri, 30 Oct 2015 09:14:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=sender:date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=FRKeFZgsntrujHi3S1vZ6E6BDJWSDqGzofx+InIk/mQ=; b=EevsCIoRKqsC+j3b69pShlbK8aMooXLTVXFv3XQ2y0N1hy6GiwgZAkhxXbz1DlJrZS SBc4m7hSyQF+LYrZuO5LhIB+8w+rz9nqlxZTOgonbse5TYaHiZzyqzNla84xDbxJIIeq yi7xodTYhg3zuXJ+LxJcflvexlmBM7a5qhed4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:date:from:to:cc:subject:message-id :references:mime-version:content-type:content-disposition :in-reply-to:user-agent; bh=FRKeFZgsntrujHi3S1vZ6E6BDJWSDqGzofx+InIk/mQ=; b=X68OF4NcNnZk7/STYuaRLmkJzh83zMwGyAs3LZJ7g5XkirtXW9VxpPW89b8xJV8D4L /DHPlK4/AYOVe8gevJA98ZMWjm0i4Z2Divtky7pTEzFc6/5wHzE/sX+M69Vo5Yo6wnrj xTpf2ihGhF5HyqKPeya4iZPDhsnQpU9RidJmxzdfr/M27rqDwExOgYnMdlAf9dJAyiwE sAdLTJTdVi5UoLiSk+S9O7HrPONkXvcblBWJCfUJHeEAxNvMywk8fULyZAKPsIsLbk7Y xdAVykH863qYxAwq7x7xXoR9vf0mDo5t6k70QNEfYFSdv1ZobQBF0/aU2F2DLOv/VEWQ RL9Q== X-Gm-Message-State: ALoCoQliyz0f98Hq+AnkZkL4EVawgw1nqXR9OH2BlcD+RAHxYwAYyPFlkNCHZIWG26st3NPBZ6g5 X-Received: by 10.28.91.72 with SMTP id p69mr4540413wmb.49.1446221663661; Fri, 30 Oct 2015 09:14:23 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:56c9:0:22cf:30ff:fe4c:37d6]) by smtp.gmail.com with ESMTPSA id 200sm3600484wms.7.2015.10.30.09.14.22 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Oct 2015 09:14:22 -0700 (PDT) Date: Fri, 30 Oct 2015 17:14:21 +0100 From: Daniel Vetter To: Chris Wilson Message-ID: <20151030161421.GN16848@phenom.ffwll.local> References: <1445622212-32604-1-git-send-email-chris@chris-wilson.co.uk> <1445622212-32604-2-git-send-email-chris@chris-wilson.co.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1445622212-32604-2-git-send-email-chris@chris-wilson.co.uk> X-Operating-System: Linux phenom 4.1.0-2-amd64 User-Agent: Mutt/1.5.23 (2014-03-12) Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Serialise updates to GGTT with access through GGTT on Braswell X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Oct 23, 2015 at 06:43:32PM +0100, Chris Wilson wrote: > When accessing through the GTT from one CPU whilst concurrently updating > the GGTT PTEs in another thread, the hardware likes to return random > data. As we have strong serialisation prevent us from modifying the PTE > of an active GTT mmapping, we have to conclude that it whilst modifying > other PTE's that error occurs. (I have not looked for any pattern such > as modifying PTE within the same page or cacheline as active PTE - > though checking whether revoking neighbouring objects should be enough > to test that theory.) The corruption also seems restricted to Braswell > and disappears with maxcpus=0. This patch stops all access through the > GTT by other CPUs when we update any PTE by stopping the machine around > the GGTT update. > > Testcase: igt/gem_concurrent_blit > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89079 > Signed-off-by: Chris Wilson Wild guess, since it wouldn't be the first time hw engineers screwed this up. Cheers, Daniel diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index d1c5cf89fe77..de983c8e6e54 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2337,12 +2337,8 @@ int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj) static void gen8_set_pte(void __iomem *addr, gen8_pte_t pte) { -#ifdef writeq - writeq(pte, addr); -#else iowrite32((u32)pte, addr); iowrite32(pte >> 32, addr + 4); -#endif } static void gen8_ggtt_insert_entries(struct i915_address_space *vm,