From patchwork Tue Oct 4 20:11:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9362245 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 64929608A6 for ; Tue, 4 Oct 2016 20:11:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 55FE728B57 for ; Tue, 4 Oct 2016 20:11:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 45C7F28B58; Tue, 4 Oct 2016 20:11:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AC03428B58 for ; Tue, 4 Oct 2016 20:11:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C38696E742; Tue, 4 Oct 2016 20:11:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3D54E6E73D for ; Tue, 4 Oct 2016 20:11:40 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id b201so16187032wmb.1 for ; Tue, 04 Oct 2016 13:11:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id; bh=eto9ya6jW+T0lwv5XG0+z4o3KPkxcNGanV33uPt/jkk=; b=VgAUoal2t6tRoYCzzj8sB7b4RJY7BsJEW4vIq1xRwnPIIC+ts3Lt39/g2p5IlLOR6g Ng1MrHOi7JS9EQ/VPA31+XiH2ocuGpyarZIVpwnFBRn7aAkHJ7TEZu9B+eyngyu1JSk4 eKaiAB9I9naZEv5yIh9d0C0KYEMQ8Z9ZzjEJFKrR46yyeSQi3TLyK73cVWLD5isW1JM8 V5gjTZa1k6PJc1LLtXd5ItVgDPJX2gk8gJkqRlCFrf7bapTXCGt94Mu3+a7xfOwb01lK vQLYHiqNYTBfU6EfUVIXpRPeGGvxzXRw6RLfLySm1vljubKh3gAORcIPGdqoiiZEDsqk dGKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id; bh=eto9ya6jW+T0lwv5XG0+z4o3KPkxcNGanV33uPt/jkk=; b=DQAToffK0rISX866j64p3q6V6vtkYjZW0ORMKiiHO2qXTRYJASVM2yaNfOmzBBPvha 5+9++faqD8r0TeJUFJRZ/5Z0JbjbPiX6eXq4X7zpLPWE1Ck4+XngUw5cLq11M3rXDMlv yLbqpoJhe1o0uaNOjwockjyhwKEixr42Ctn5JDjNM5LC0J9es3A9l8gGzNeHO+TKV3dc I3f10qxxTjU4ae1bGrV8ewxoTR0PAS9EyWqIvAJ4F+iqqzpeGKXrybme6c8TKxazfG9q WLc8gr5OqBZb+BdGUZUpVS62KAsw0ZmK/iAXWADb7vJsmzmcsjwxD7R4lAQSaWh0tuEQ 57XQ== X-Gm-Message-State: AA6/9RlWPfsQzS6mg+CyErvwmsv3ag2rpsOHzfE+E1ffZPBA200vHHyoRufbA/WvS9CO/Q== X-Received: by 10.28.174.76 with SMTP id x73mr5622426wme.60.1475611898612; Tue, 04 Oct 2016 13:11:38 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id b8sm5173969wjq.40.2016.10.04.13.11.37 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Oct 2016 13:11:37 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 4 Oct 2016 21:11:25 +0100 Message-Id: <20161004201132.21801-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.9.3 Subject: [Intel-gfx] [CI 1/8] drm/i915: Share the computation of ring size for RING_CTL register X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Since both legacy and execlists want to populate the RING_CTL register, share the computation of the right bits for the ring->size. We can then stop masking errors and explicitly forbid them during creation! Signed-off-by: Chris Wilson Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 2 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 5 ++--- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8d44cee710f0..acc767a52d8e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1605,6 +1605,7 @@ enum skl_disp_power_wells { #define RING_HEAD(base) _MMIO((base)+0x34) #define RING_START(base) _MMIO((base)+0x38) #define RING_CTL(base) _MMIO((base)+0x3c) +#define RING_CTL_SIZE(size) ((size) - PAGE_SIZE) /* in bytes -> pages */ #define RING_SYNC_0(base) _MMIO((base)+0x40) #define RING_SYNC_1(base) _MMIO((base)+0x44) #define RING_SYNC_2(base) _MMIO((base)+0x48) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 2d8eb2eb2b72..5ede272eb4d2 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1946,7 +1946,7 @@ populate_lr_context(struct i915_gem_context *ctx, RING_START(engine->mmio_base), 0); ASSIGN_CTX_REG(reg_state, CTX_RING_BUFFER_CONTROL, RING_CTL(engine->mmio_base), - ((ring->size - PAGE_SIZE) & RING_NR_PAGES) | RING_VALID); + RING_CTL_SIZE(ring->size) | RING_VALID); ASSIGN_CTX_REG(reg_state, CTX_BB_HEAD_U, RING_BBADDR_UDW(engine->mmio_base), 0); ASSIGN_CTX_REG(reg_state, CTX_BB_HEAD_L, diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 67ea9dd5921e..8206e2aa03c6 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -585,9 +585,7 @@ static int init_ring_common(struct intel_engine_cs *engine) I915_WRITE_TAIL(engine, ring->tail); (void)I915_READ_TAIL(engine); - I915_WRITE_CTL(engine, - ((ring->size - PAGE_SIZE) & RING_NR_PAGES) - | RING_VALID); + I915_WRITE_CTL(engine, RING_CTL_SIZE(ring->size) | RING_VALID); /* If the head is still not zero, the ring is dead */ if (intel_wait_for_register_fw(dev_priv, RING_CTL(engine->mmio_base), @@ -1951,6 +1949,7 @@ intel_engine_create_ring(struct intel_engine_cs *engine, int size) struct i915_vma *vma; GEM_BUG_ON(!is_power_of_2(size)); + GEM_BUG_ON(RING_CTL_SIZE(size) & ~RING_NR_PAGES); ring = kzalloc(sizeof(*ring), GFP_KERNEL); if (!ring)