From patchwork Wed Nov 2 17:50:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9409687 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A713B601C2 for ; Wed, 2 Nov 2016 17:51:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A06EB2A4DF for ; Wed, 2 Nov 2016 17:51:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 955582A4E1; Wed, 2 Nov 2016 17:51:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RCVD_IN_SORBS_SPAM,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 38DCA2A4DF for ; Wed, 2 Nov 2016 17:51:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7D8F76E5FE; Wed, 2 Nov 2016 17:51:01 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 409C46E5F3 for ; Wed, 2 Nov 2016 17:51:00 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id 68so4196186wmz.2 for ; Wed, 02 Nov 2016 10:51:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=7EhebarCdX0LNA6R8RQIZYzS+gL7GXP/z0SRLBsiW2E=; b=DjVp3QjxoEIjB+ZJMqNnBqxv1RMwMrOhbJckOsGUn/ck/cQZg9+oRjeRgvCMtL2KOl +U78l+KSkmQ2BzW7bafifrAexXfYzf5AZi02Rba9frtzobZy7Do+88LLCMRNp944KI70 UCMEm0F9xJMQk14jPNZqj3hIGgfdKKugOYj2odvepLprW6jubnbyrf2eCz2Sq1KK6OcF SZV+skJQoTatDB1rXbsiPPkz4cR1rsEgRvw0r4IQJRX0Rbqc9KAbtEBD0j6TZTBFxFjR oKRPPicvA1kX74A+ZjRkf1YcK/E22vGrJojGVFCFbDLLGyTraDpxFMDUZ1zMQVecI7rU ayuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=7EhebarCdX0LNA6R8RQIZYzS+gL7GXP/z0SRLBsiW2E=; b=NdbPXriy5b81qQW5ZnkOHaolCZZA6Gd3TdY4U1bzO4S/Q4MvsyZBMnn7XcjXe04NiO P12yq0BYFJIQR9Z4WDHjCKFKfjKqgb9Y8gBKjbQn+L78tyfb1y2GDmJ+1Nf9m+0bx4Sx D421KxD/yM4Q/TNGM6r7msYzQifJcozI1UALtLqFhJcMJ8bxEQa+F26/l5G01J1kJiBe nTnoxN3V7ZBnTrKsrzf557DCKmsMbXDNim8S2jV/884Bx5LvDEsfoBE4tWEkMAs2ADgA 1ceVbkZ2Jmm7q5san8IxDLbWtjxJLMDb5E57eJ5dKuMPyhi3gNOMPKJQGEShBbrlY4nk BCVg== X-Gm-Message-State: ABUngvegevBn9Pd9EZ9LSykC+Of8Y7aFt6EV95PpBkDQROLyJCgmE69ASLjU/+xfGZ56RA== X-Received: by 10.194.116.104 with SMTP id jv8mr3918336wjb.12.1478109058653; Wed, 02 Nov 2016 10:50:58 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id e2sm4065605wjw.14.2016.11.02.10.50.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Nov 2016 10:50:57 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Wed, 2 Nov 2016 17:50:43 +0000 Message-Id: <20161102175051.29163-5-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20161102175051.29163-1-chris@chris-wilson.co.uk> References: <20161102175051.29163-1-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 04/12] drm/i915/scheduler: Signal the arrival of a new request X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The start of the scheduler, add a hook into request submission for the scheduler to see the arrival of new requests and prepare its runqueues. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.c | 4 ++++ drivers/gpu/drm/i915/i915_gem_request.c | 13 +++++++++++++ drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ drivers/gpu/drm/i915/intel_ringbuffer.h | 9 +++++++++ include/uapi/drm/i915_drm.h | 5 +++++ 5 files changed, 34 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 79cea49183b3..5a0e885e6104 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -323,6 +323,10 @@ static int i915_getparam(struct drm_device *dev, void *data, */ value = i915_gem_mmap_gtt_version(); break; + case I915_PARAM_HAS_SCHEDULER: + value = dev_priv->engine[RCS] && + dev_priv->engine[RCS]->schedule; + break; case I915_PARAM_MMAP_VERSION: /* Remember to bump this if the version changes! */ case I915_PARAM_HAS_GEM: diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c index 05544dec5de9..9c8605c834f9 100644 --- a/drivers/gpu/drm/i915/i915_gem_request.c +++ b/drivers/gpu/drm/i915/i915_gem_request.c @@ -759,6 +759,19 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches) i915_gem_mark_busy(engine); + /* Let the backend know a new request has arrived that may need + * to adjust the existing execution schedule due to a high priority + * request - i.e. we may want to preempt the current request in order + * to run a high priority dependency chain *before* we can execute this + * request. + * + * This is called before the request is ready to run so that we can + * decide whether to preempt the entire chain so that it is ready to + * run at the earliest possible convenience. + */ + if (engine->schedule) + engine->schedule(request, 0); + local_bh_disable(); i915_sw_fence_commit(&request->submit); local_bh_enable(); /* Kick the execlists tasklet if just scheduled */ diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index 298f0f95dd3f..c9171a058478 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -102,6 +102,9 @@ intel_engine_setup(struct drm_i915_private *dev_priv, engine->mmio_base = info->mmio_base; engine->irq_shift = info->irq_shift; + /* Nothing to do here, execute in order of dependencies */ + engine->schedule = NULL; + dev_priv->engine[id] = engine; return 0; } diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 062bc8e1872a..75991a3c694b 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -267,6 +267,15 @@ struct intel_engine_cs { */ void (*submit_request)(struct drm_i915_gem_request *req); + /* Call when the priority on a request has changed and it and its + * dependencies may need rescheduling. Note the request itself may + * not be ready to run! + * + * Called under the struct_mutex. + */ + void (*schedule)(struct drm_i915_gem_request *request, + int priority); + /* Some chipsets are not quite as coherent as advertised and need * an expensive kick to force a true read of the up-to-date seqno. * However, the up-to-date seqno is not always required and the last diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 03725fe89859..1c12a350eca3 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -389,6 +389,11 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_MIN_EU_IN_POOL 39 #define I915_PARAM_MMAP_GTT_VERSION 40 +/* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution + * priorities and the driver will attempt to execute batches in priority order. + */ +#define I915_PARAM_HAS_SCHEDULER 41 + typedef struct drm_i915_getparam { __s32 param; /*