| Message ID | 20161219172840.31842-12-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 2016-12-19 at 19:28 +0200, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Move the vlv_program_pfi_credits() into vlv_set_cdclk() and > chv_set_cdclk() so that we can neuter vlv_modeset_commit_cdclk(). > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_cdclk.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c > b/drivers/gpu/drm/i915/intel_cdclk.c > index 11a0f3e122c3..fe7a9e3a4f29 100644 > --- a/drivers/gpu/drm/i915/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/intel_cdclk.c > @@ -494,6 +494,8 @@ static void vlv_set_cdclk(struct drm_i915_private > *dev_priv, > > mutex_unlock(&dev_priv->sb_lock); > > + vlv_program_pfi_credits(dev_priv); > + > intel_update_cdclk(dev_priv); > } > > @@ -533,6 +535,8 @@ static void chv_set_cdclk(struct drm_i915_private > *dev_priv, > } > mutex_unlock(&dev_priv->rps.hw_lock); > > + vlv_program_pfi_credits(dev_priv); > + > intel_update_cdclk(dev_priv); Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Can the vlv/chv register write in intel_update_cdclk() be moved to the set_cdclk() funcs too? > } > > @@ -1433,7 +1437,6 @@ static void vlv_modeset_commit_cdclk(struct > drm_atomic_state *old_state) > else > vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual); > > - vlv_program_pfi_credits(dev_priv); > > intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A); > }
On Fri, Dec 23, 2016 at 03:49:02PM +0200, Ander Conselvan De Oliveira wrote: > On Mon, 2016-12-19 at 19:28 +0200, ville.syrjala@linux.intel.com wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Move the vlv_program_pfi_credits() into vlv_set_cdclk() and > > chv_set_cdclk() so that we can neuter vlv_modeset_commit_cdclk(). > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > --- > > drivers/gpu/drm/i915/intel_cdclk.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c > > b/drivers/gpu/drm/i915/intel_cdclk.c > > index 11a0f3e122c3..fe7a9e3a4f29 100644 > > --- a/drivers/gpu/drm/i915/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/intel_cdclk.c > > @@ -494,6 +494,8 @@ static void vlv_set_cdclk(struct drm_i915_private > > *dev_priv, > > > > mutex_unlock(&dev_priv->sb_lock); > > > > + vlv_program_pfi_credits(dev_priv); > > + > > intel_update_cdclk(dev_priv); > > } > > > > @@ -533,6 +535,8 @@ static void chv_set_cdclk(struct drm_i915_private > > *dev_priv, > > } > > mutex_unlock(&dev_priv->rps.hw_lock); > > > > + vlv_program_pfi_credits(dev_priv); > > + > > intel_update_cdclk(dev_priv); > > Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> > > Can the vlv/chv register write in intel_update_cdclk() be moved to the set_cdclk() funcs too? We'll still need to initialize it at driver load time. I supoose I could also add it to the power well enable hook. IIRC this register probably had some magic retention logic while the power well is off so that we don't actually lose the state (the register is simply inaccessible while the power well is down). So for normal power well activity we wouldn't really need to rewrite the register every time, but I guess there'd not be much harm in doing it anyway. But I'll have to double check this stuff since I'm not 100% sure. > > > > } > > > > @@ -1433,7 +1437,6 @@ static void vlv_modeset_commit_cdclk(struct > > drm_atomic_state *old_state) > > else > > vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual); > > > > - vlv_program_pfi_credits(dev_priv); > > > > intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A); > > } > >
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index 11a0f3e122c3..fe7a9e3a4f29 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -494,6 +494,8 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv, mutex_unlock(&dev_priv->sb_lock); + vlv_program_pfi_credits(dev_priv); + intel_update_cdclk(dev_priv); } @@ -533,6 +535,8 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv, } mutex_unlock(&dev_priv->rps.hw_lock); + vlv_program_pfi_credits(dev_priv); + intel_update_cdclk(dev_priv); } @@ -1433,7 +1437,6 @@ static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state) else vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual); - vlv_program_pfi_credits(dev_priv); intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A); }