From patchwork Thu Dec 22 13:52:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9485061 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 77F74601D2 for ; Thu, 22 Dec 2016 13:52:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6655327FB6 for ; Thu, 22 Dec 2016 13:52:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 59BD52811C; Thu, 22 Dec 2016 13:52:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C488C27FB6 for ; Thu, 22 Dec 2016 13:52:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DED1E6F2B7; Thu, 22 Dec 2016 13:52:30 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 134616F2B7 for ; Thu, 22 Dec 2016 13:52:29 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id m203so36280592wma.3 for ; Thu, 22 Dec 2016 05:52:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=2X38CJPejG7Es3NYxFliUllLf/1MGB3v3FVFxU1H/kA=; b=u0Svx2twtwapxRck7ni1hSXXUQERlBLXCybmUlqS8wgasPeudSDdH+Z2Gmz/s7jTVv AR6bMuGfXJjzwPgsmy2BA8CYI2NRSFfJi8Or/A7UDumbJRNwoqHQpa2gDdBYw8epEk2h BioILdaa2dR2WUYdLUzn6e7WYM0Q95B7QlE7eDbi1kM5Vrvqj/0E4H/2dZCfPYLPbBki HGyyzbDxA9QWPrJgoBLZgMATr6hafFJmSryKXvW2WF7FTsXjtdZXiW2xQacMDYGxUlzr x8BQp6BFrJDo/7h8kQYikE14fkKRG5j6LljiPTMblGM/nBFDlUJZmL/FxBo4h8eaeecv CZ1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=2X38CJPejG7Es3NYxFliUllLf/1MGB3v3FVFxU1H/kA=; b=NuBOqXKZv8uTxVYROrYz2gqLOh30H38D2AhocEtsjWfj1acYPW9RpsUjN4jqRcut6t E7AiERwtXxsdNKe8qo9R0T/HG9ZMY04kdRCs7Uq1D0Y1CkLKHkbHZrBljTihxWZUeTUg luHZdWIcDqQN4K9XcdIbFgiXd5kzxAB89AFANIKK4j4rhtJN33CUnDoEbAWrQdh6PSwU 8MHjpoOAlbls2HFwkvPZoUZruIk83Z0sI/TFDyqV2sptcX1JxK7GVVn2nsnsc240LMyU L3UD/nxzhAebjLynsn+eFRIPObReTiolA8IRAiSjo6OQwO5IkiDcXoTbakGYsoMHAb0e iT5A== X-Gm-Message-State: AIkVDXJie0+Cviv2WDM6DijQLvkddqV8HrtqLQbBs7uyLpWZQpiFVFGrSA5VV+WSPW0ybw== X-Received: by 10.28.149.135 with SMTP id x129mr12317567wmd.71.1482414747303; Thu, 22 Dec 2016 05:52:27 -0800 (PST) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id f67sm32249255wmd.13.2016.12.22.05.52.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 22 Dec 2016 05:52:26 -0800 (PST) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Dec 2016 13:52:24 +0000 Message-Id: <20161222135224.11886-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.11.0 Cc: Daniel Vetter , "Zanoni, Paulo R" Subject: [Intel-gfx] [PATCH] drm/i915: Revoke partial fences when installing on the scanout X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP In commit 50349247ea80 ("drm/i915: Drop ORIGIN_GTT for untracked GTT writes") partial mmaps were updated to indicate that writes through them were not tracked automatically by the hardware and that the expected subsequent manual invalidations by the application (on calling dirtyfb at the end of the frame) take over from the hardware tracking. However, not all applications actually call dirtyfb on the scanout after they dirty it and so those writes through partial GTT mmaps are not being tracked and triggering FBC updates. Fixes: a61007a83a46 ("drm/i915: Fix partial GGTT faulting") Signed-off-by: Chris Wilson Cc: Daniel Vetter Cc: "Zanoni, Paulo R" Tested-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_gem.c | 25 ++++++++++++++++++++----- drivers/gpu/drm/i915/i915_gem_object.h | 2 ++ drivers/gpu/drm/i915/intel_display.c | 10 +++++++++- 3 files changed, 31 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f379c5484a84..d51c9b209837 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1882,11 +1882,6 @@ int i915_gem_fault(struct vm_area_struct *area, struct vm_fault *vmf) compute_partial_view(obj, area, page_offset, MIN_CHUNK_PAGES); - /* Userspace is now writing through an untracked VMA, abandon - * all hope that the hardware is able to track future writes. - */ - obj->frontbuffer_ggtt_origin = ORIGIN_CPU; - vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE); } if (IS_ERR(vma)) { @@ -2015,6 +2010,26 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj) intel_runtime_pm_put(i915); } +bool i915_gem_object_has_partial_fences(struct drm_i915_gem_object *obj) +{ + struct i915_vma *vma; + + lockdep_assert_held(&obj->base.dev->struct_mutex); + + list_for_each_entry(vma, &obj->vma_list, obj_link) { + if (!i915_vma_is_ggtt(vma)) + break; + + if (vma->ggtt_view.type != I915_GGTT_VIEW_NORMAL) + continue; + + if (vma->fence) + return true; + } + + return false; +} + void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) { struct drm_i915_gem_object *obj, *on; diff --git a/drivers/gpu/drm/i915/i915_gem_object.h b/drivers/gpu/drm/i915/i915_gem_object.h index 36e0c50e2099..03c066cbdbfd 100644 --- a/drivers/gpu/drm/i915/i915_gem_object.h +++ b/drivers/gpu/drm/i915/i915_gem_object.h @@ -333,5 +333,7 @@ i915_gem_object_last_write_engine(struct drm_i915_gem_object *obj) return engine; } +bool i915_gem_object_has_partial_fences(struct drm_i915_gem_object *obj); + #endif diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index aaec753e510e..89d8dffed546 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2236,8 +2236,16 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, unsigned int rotation) * something and try to run the system in a "less than optimal" * mode that matches the user configuration. */ - if (i915_vma_get_fence(vma) == 0) + if (i915_vma_get_fence(vma) == 0) { i915_vma_pin_fence(vma); + + /* Revoke any partial fences and force users of + * those mmapings to transfer over to this fence + * under the watchful gaze of FBC. + */ + if (i915_gem_object_has_partial_fences(obj)) + i915_gem_release_mmap(obj); + } } i915_vma_get(vma);