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[3/4] drm/i915: Dequeue execlists on a new request if any port is available

Message ID 20170121092815.1431-3-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Chris Wilson Jan. 21, 2017, 9:28 a.m. UTC
If the second ELSP port is available, schedule the execlists tasklet to
see if the new request can occupy it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Tvrtko Ursulin Jan. 23, 2017, 10:56 a.m. UTC | #1
On 21/01/2017 09:28, Chris Wilson wrote:
> If the second ELSP port is available, schedule the execlists tasklet to
> see if the new request can occupy it.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 9e56e1604e7f..d2cbdc730e14 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -661,7 +661,7 @@ static void execlists_submit_request(struct drm_i915_gem_request *request)
>
>  	if (insert_request(&request->priotree, &engine->execlist_queue))
>  		engine->execlist_first = &request->priotree.node;
> -	if (execlists_elsp_idle(engine))
> +	if (execlists_elsp_ready(engine))
>  		tasklet_hi_schedule(&engine->irq_tasklet);
>
>  	spin_unlock_irqrestore(&engine->timeline->lock, flags);
>

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
Chris Wilson Jan. 23, 2017, 11:21 a.m. UTC | #2
On Mon, Jan 23, 2017 at 10:56:12AM +0000, Tvrtko Ursulin wrote:
> 
> On 21/01/2017 09:28, Chris Wilson wrote:
> >If the second ELSP port is available, schedule the execlists tasklet to
> >see if the new request can occupy it.
> >
> >Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >---
> > drivers/gpu/drm/i915/intel_lrc.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >index 9e56e1604e7f..d2cbdc730e14 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.c
> >+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >@@ -661,7 +661,7 @@ static void execlists_submit_request(struct drm_i915_gem_request *request)
> >
> > 	if (insert_request(&request->priotree, &engine->execlist_queue))
> > 		engine->execlist_first = &request->priotree.node;
> >-	if (execlists_elsp_idle(engine))
> >+	if (execlists_elsp_ready(engine))
> > 		tasklet_hi_schedule(&engine->irq_tasklet);
> >
> > 	spin_unlock_irqrestore(&engine->timeline->lock, flags);
> >
> 
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Note that I need to fix the irq_tasklet not to read CSB prior to the
first interrupt before this patch works in all circumstances.
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 9e56e1604e7f..d2cbdc730e14 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -661,7 +661,7 @@  static void execlists_submit_request(struct drm_i915_gem_request *request)
 
 	if (insert_request(&request->priotree, &engine->execlist_queue))
 		engine->execlist_first = &request->priotree.node;
-	if (execlists_elsp_idle(engine))
+	if (execlists_elsp_ready(engine))
 		tasklet_hi_schedule(&engine->irq_tasklet);
 
 	spin_unlock_irqrestore(&engine->timeline->lock, flags);