From patchwork Fri Jan 27 17:42:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Bragg X-Patchwork-Id: 9542407 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9C063604A0 for ; Fri, 27 Jan 2017 17:42:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8F06B276D6 for ; Fri, 27 Jan 2017 17:42:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 83FB427D4A; Fri, 27 Jan 2017 17:42:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2431C276D6 for ; Fri, 27 Jan 2017 17:42:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A9B496EE00; Fri, 27 Jan 2017 17:42:37 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pf0-x242.google.com (mail-pf0-x242.google.com [IPv6:2607:f8b0:400e:c00::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 33A186EDF7 for ; Fri, 27 Jan 2017 17:42:33 +0000 (UTC) Received: by mail-pf0-x242.google.com with SMTP id e4so18926023pfg.0 for ; Fri, 27 Jan 2017 09:42:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=2pRSAbSXUWn7PxXZKoe7F8z2SA76ce6PlXgMJRPYwXg=; b=Yy0fJW9FEkkpRoIqNtBylk2j/3q7C49w9NbUfkg9IpL1o1tPPrn5d76HpQvW1mEk9L ZgQPvWom/rsRAlS4lFwrh3vOM02Ip3ejB2C4kU9SONurEcl4JYxc0vuje/NgFvghBIzr 6I8kJf5Lk2hoOvR7HHxrPhXuxkRCgj8UZQaVUBImBSv74I6Rub4v2DcfyaYxXRaRZSi6 6MzUZ18MhhR+MMoq+FwHJ/q0ZmvtPHko7KbYE+q5wZH1SIb4E/RLdsd3PSgfhWcuRzLE ESvwjGvHDTnkhPhEoNgSteZ6Q5hnUiavKjCvhMh32kVFOxKc1PSgPoTBruc407NVkqDb ki/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=2pRSAbSXUWn7PxXZKoe7F8z2SA76ce6PlXgMJRPYwXg=; b=pFKqCWWzV3e4mZUHRAwyaH3aqOacHn8GitxU7uGdDJtS/UP+Jr2iBNBhv32SXxEtBR oSfPX/WNO43DNGJIZMXbfnvLyC+UdTi9Vc7L6d4ocWs/agcTO4Ov3MGIQnAK8nrxScor YBtQ9KgR27ugMnqsL9/C+I5KCtkmixrnzyO6OqqVizdhaDWmEZZn0CU6FP07lVPzJhi0 xhtyRusxLwPvN2re7fwsiTvt5ceuMQWi4SwiYr6kt8L1feqqnsMYxg6g8vAomrTPYZOh mqUXFkeeeeN0RJ7bS0Geo/zaAyB9aG/ZsDB15OW7smzjVQD8NP6GBxIeT/zf8gJZWcSw HbcQ== X-Gm-Message-State: AIkVDXJnWg+Zs1+7l+//7UMsOcovEiX+ZE2XmPZO5MlLYKnvHEy3S70jMzuydptD+Ol3Dg== X-Received: by 10.99.225.5 with SMTP id z5mr10653253pgh.145.1485538952698; Fri, 27 Jan 2017 09:42:32 -0800 (PST) Received: from sixbynine.org ([207.194.157.2]) by smtp.gmail.com with ESMTPSA id c2sm12879798pfl.61.2017.01.27.09.42.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Jan 2017 09:42:32 -0800 (PST) From: Robert Bragg To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Jan 2017 09:42:04 -0800 Message-Id: <20170127174205.15325-5-robert@sixbynine.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170127174205.15325-1-robert@sixbynine.org> References: <20170127174205.15325-1-robert@sixbynine.org> Subject: [Intel-gfx] [PATCH v2 4/5] drm/i915/perf: no head/tail ref in gen7_oa_read X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This avoids redundantly passing an (inout) head and tail pointer to gen7_append_oa_reports() from gen7_oa_read which doesn't need to reference either itself. Moving the head/tail reads and writes into gen7_append_oa_reports should have no functional effect except to avoid some redundant head pointer writes in cases where nothing was copied to userspace. This is a stepping stone towards updating how the head and tail pointer state is managed to improve the workaround for the OA unit's tail pointer race. It reduces the number of places we need to read/write the head and tail pointers. Signed-off-by: Robert Bragg Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/i915_perf.c | 51 +++++++++++++++------------------------- 1 file changed, 19 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index e85583d0bcff..4b3babdbd79e 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -420,8 +420,6 @@ static int append_oa_sample(struct i915_perf_stream *stream, * @buf: destination buffer given by userspace * @count: the number of bytes userspace wants to read * @offset: (inout): the current position for writing into @buf - * @head_ptr: (inout): the current oa buffer cpu read position - * @tail: the current oa buffer gpu write position * * Notably any error condition resulting in a short read (-%ENOSPC or * -%EFAULT) will be returned even though one or more records may @@ -439,9 +437,7 @@ static int append_oa_sample(struct i915_perf_stream *stream, static int gen7_append_oa_reports(struct i915_perf_stream *stream, char __user *buf, size_t count, - size_t *offset, - u32 *head_ptr, - u32 tail) + size_t *offset) { struct drm_i915_private *dev_priv = stream->dev_priv; int report_size = dev_priv->perf.oa.oa_buffer.format_size; @@ -449,14 +445,15 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream, int tail_margin = dev_priv->perf.oa.tail_margin; u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); u32 mask = (OA_BUFFER_SIZE - 1); - u32 head; + size_t start_offset = *offset; + u32 head, oastatus1, tail; u32 taken; int ret = 0; if (WARN_ON(!stream->enabled)) return -EIO; - head = *head_ptr - gtt_offset; + head = dev_priv->perf.oa.oa_buffer.head - gtt_offset; /* An out of bounds or misaligned head pointer implies a driver bug * since we are in full control of head pointer which should only @@ -467,7 +464,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream, "Inconsistent OA buffer head pointer = %u\n", head)) return -EIO; - tail -= gtt_offset; + oastatus1 = I915_READ(GEN7_OASTATUS1); + tail = (oastatus1 & GEN7_OASTATUS1_TAIL_MASK) - gtt_offset; /* The OA unit is expected to wrap the tail pointer according to the OA * buffer size @@ -477,8 +475,6 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream, tail); dev_priv->perf.oa.ops.oa_disable(dev_priv); dev_priv->perf.oa.ops.oa_enable(dev_priv); - *head_ptr = I915_READ(GEN7_OASTATUS2) & - GEN7_OASTATUS2_HEAD_MASK; return -EIO; } @@ -542,7 +538,18 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream, report32[0] = 0; } - *head_ptr = gtt_offset + head; + + if (start_offset != *offset) { + /* We removed the gtt_offset for the copy loop above, indexing + * relative to oa_buf_base so put back here... + */ + head += gtt_offset; + + I915_WRITE(GEN7_OASTATUS2, + ((head & GEN7_OASTATUS2_HEAD_MASK) | + OA_MEM_SELECT_GGTT)); + dev_priv->perf.oa.oa_buffer.head = head; + } return ret; } @@ -570,8 +577,6 @@ static int gen7_oa_read(struct i915_perf_stream *stream, { struct drm_i915_private *dev_priv = stream->dev_priv; u32 oastatus1; - u32 head; - u32 tail; int ret; if (WARN_ON(!dev_priv->perf.oa.oa_buffer.vaddr)) @@ -579,9 +584,6 @@ static int gen7_oa_read(struct i915_perf_stream *stream, oastatus1 = I915_READ(GEN7_OASTATUS1); - head = dev_priv->perf.oa.oa_buffer.head; - tail = oastatus1 & GEN7_OASTATUS1_TAIL_MASK; - /* XXX: On Haswell we don't have a safe way to clear oastatus1 * bits while the OA unit is enabled (while the tail pointer * may be updated asynchronously) so we ignore status bits @@ -621,9 +623,6 @@ static int gen7_oa_read(struct i915_perf_stream *stream, dev_priv->perf.oa.ops.oa_enable(dev_priv); oastatus1 = I915_READ(GEN7_OASTATUS1); - - head = dev_priv->perf.oa.oa_buffer.head; - tail = oastatus1 & GEN7_OASTATUS1_TAIL_MASK; } if (unlikely(oastatus1 & GEN7_OASTATUS1_REPORT_LOST)) { @@ -635,19 +634,7 @@ static int gen7_oa_read(struct i915_perf_stream *stream, GEN7_OASTATUS1_REPORT_LOST; } - ret = gen7_append_oa_reports(stream, buf, count, offset, - &head, tail); - - /* Note: we update the head pointer here even if an error - * was returned since the error may represent a short read - * where some some reports were successfully copied. - */ - I915_WRITE(GEN7_OASTATUS2, - ((head & GEN7_OASTATUS2_HEAD_MASK) | - OA_MEM_SELECT_GGTT)); - dev_priv->perf.oa.oa_buffer.head = head; - - return ret; + return gen7_append_oa_reports(stream, buf, count, offset); } /**