From patchwork Thu Feb 2 15:13:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9552249 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DB2E960236 for ; Thu, 2 Feb 2017 15:13:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA31428304 for ; Thu, 2 Feb 2017 15:13:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CEFB028425; Thu, 2 Feb 2017 15:13:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 54E8B28304 for ; Thu, 2 Feb 2017 15:13:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C8B396EA4B; Thu, 2 Feb 2017 15:13:30 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E9006EA48 for ; Thu, 2 Feb 2017 15:13:28 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id v77so4678066wmv.0 for ; Thu, 02 Feb 2017 07:13:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=trYK/X6jhDDpTpOJM1myGzns14Iw+B6w/dygr9RInSs=; b=a8xHaUv3b1lIQG10r+AwEbwehJhCWHyUkFvNY+UMHgCnAIoB1NC6f0g9ZY9aj8qYK4 r0UAXv15JdheRt+puwRukOF/501Q0jPh5cmDHSbo4/ZgC6iXOgtxSUycgwmFY6A7FCX7 FrqPLNgh+jUX9Rjr1SpqKaKhYuJQJ/a+vyn24JyE9w4N6WKb4FZpbXbpljNcNc1PhI+F pkeAUEBOSuPhZRFXWL6JGPnz0gRBgdsa2Z3z8WQ9wNXocuqPg/qKHJHapmTl9p8C/Sme v+8VxJAnwwgOqrD/ZgOFN0pfSWq/nNGLKRYhjKc6pUOefDnDmAGRI4PnQ7JrH7nESXKP 1oeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=trYK/X6jhDDpTpOJM1myGzns14Iw+B6w/dygr9RInSs=; b=FOmkCbKB9ptNrAF+FqCpsQY5GQ2ILOsnrvCmJMKuDfGG6Gz6hRuxIrOmnXKLlCwFkm AUSbfN3voSY+6Vac8ynGx6yht1WVoqwdXcEzKjeBn8b/XvKx2Y5D3Puk0hrFvygObXHE G9lPMlzM5KsMykZBfkKHGpTkdTFu335EGqsc0xuHhxctY1SCkZft6KS46onOaT2caBFA 335zhH6UVu9D4QYth7k5bMVx8Kh912tTi+P/E7La2jZlFI2FFS3LJ7IAhzuFtEUm7L3U XwEQ87DhY847H68kmRSJLg8Ocsv8yOlSEXzR/EDYeaL/c9H6KBMADX9cT3cykjOoY6dQ YBQw== X-Gm-Message-State: AIkVDXKNt+oNXJwGp5tmg0Hlgd4keBVEklZSBq1rNLqFVUjPl5sR/OF3HLCFIV8iznGDrw== X-Received: by 10.28.221.7 with SMTP id u7mr27155875wmg.33.1486048406974; Thu, 02 Feb 2017 07:13:26 -0800 (PST) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id o81sm3624020wmb.14.2017.02.02.07.13.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Feb 2017 07:13:26 -0800 (PST) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 2 Feb 2017 15:13:07 +0000 Message-Id: <20170202151312.31406-9-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170202151312.31406-1-chris@chris-wilson.co.uk> References: <20170202151312.31406-1-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 09/14] drm/i915: Remove the preempted request from the execution queue X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP After the request is cancelled, we then need to remove it from the global execution timeline and return it to the context timeline, the inverse of submit_request(). Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_request.c | 58 +++++++++++++++++++++++++++++++- drivers/gpu/drm/i915/i915_gem_request.h | 3 ++ drivers/gpu/drm/i915/intel_breadcrumbs.c | 19 +++++++++-- 3 files changed, 77 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c index 82606f8fd244..f70a2c3d26cd 100644 --- a/drivers/gpu/drm/i915/i915_gem_request.c +++ b/drivers/gpu/drm/i915/i915_gem_request.c @@ -435,6 +435,55 @@ void i915_gem_request_submit(struct drm_i915_gem_request *request) spin_unlock_irqrestore(&engine->timeline->lock, flags); } +void __i915_gem_request_unsubmit(struct drm_i915_gem_request *request) +{ + struct intel_engine_cs *engine = request->engine; + struct intel_timeline *timeline; + + assert_spin_locked(&engine->timeline->lock); + + /* Only unwind in reverse order, required so that the per-context list + * is kept in seqno/ring order. + */ + GEM_BUG_ON(request->global_seqno != engine->timeline->seqno); + engine->timeline->seqno--; + + /* We may be recursing from the signal callback of another i915 fence */ + spin_lock_nested(&request->lock, SINGLE_DEPTH_NESTING); + request->global_seqno = 0; + if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags)) + intel_engine_cancel_signaling(request); + spin_unlock(&request->lock); + + /* Transfer back from the global per-engine timeline to per-context */ + timeline = request->timeline; + GEM_BUG_ON(timeline == engine->timeline); + + spin_lock(&timeline->lock); + list_move(&request->link, &timeline->requests); + spin_unlock(&timeline->lock); + + /* We don't need to wake_up any waiters on request->execute, they + * will get woken by any other event or us re-adding this request + * to the engine timeline (__i915_gem_request_submit()). The waiters + * should be quite adapt at finding that the request now has a new + * global_seqno to the one they went to sleep on. + */ +} + +void i915_gem_request_unsubmit(struct drm_i915_gem_request *request) +{ + struct intel_engine_cs *engine = request->engine; + unsigned long flags; + + /* Will be called from irq-context when using foreign fences. */ + spin_lock_irqsave(&engine->timeline->lock, flags); + + __i915_gem_request_unsubmit(request); + + spin_unlock_irqrestore(&engine->timeline->lock, flags); +} + static int __i915_sw_fence_call submit_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state) { @@ -1016,9 +1065,11 @@ long i915_wait_request(struct drm_i915_gem_request *req, if (flags & I915_WAIT_LOCKED) add_wait_queue(errq, &reset); - intel_wait_init(&wait, i915_gem_request_global_seqno(req)); + wait.tsk = current; +restart: reset_wait_queue(&req->execute, &exec); + wait.seqno = i915_gem_request_global_seqno(req); if (!wait.seqno) { do { set_current_state(state); @@ -1112,6 +1163,11 @@ long i915_wait_request(struct drm_i915_gem_request *req, /* Only spin if we know the GPU is processing this request */ if (i915_spin_request(req, state, 2)) break; + + if (i915_gem_request_global_seqno(req) != wait.seqno) { + intel_engine_remove_wait(req->engine, &wait); + goto restart; + } } intel_engine_remove_wait(req->engine, &wait); diff --git a/drivers/gpu/drm/i915/i915_gem_request.h b/drivers/gpu/drm/i915/i915_gem_request.h index b81f6709905c..5f73d8c0a38a 100644 --- a/drivers/gpu/drm/i915/i915_gem_request.h +++ b/drivers/gpu/drm/i915/i915_gem_request.h @@ -274,6 +274,9 @@ void __i915_add_request(struct drm_i915_gem_request *req, bool flush_caches); void __i915_gem_request_submit(struct drm_i915_gem_request *request); void i915_gem_request_submit(struct drm_i915_gem_request *request); +void __i915_gem_request_unsubmit(struct drm_i915_gem_request *request); +void i915_gem_request_unsubmit(struct drm_i915_gem_request *request); + struct intel_rps_client; #define NO_WAITBOOST ERR_PTR(-1) #define IS_RPS_CLIENT(p) (!IS_ERR(p)) diff --git a/drivers/gpu/drm/i915/intel_breadcrumbs.c b/drivers/gpu/drm/i915/intel_breadcrumbs.c index 96f78ab02447..843195f13302 100644 --- a/drivers/gpu/drm/i915/intel_breadcrumbs.c +++ b/drivers/gpu/drm/i915/intel_breadcrumbs.c @@ -431,7 +431,14 @@ void intel_engine_remove_wait(struct intel_engine_cs *engine, spin_unlock_irq(&b->lock); } -static bool signal_complete(struct drm_i915_gem_request *request) +static bool signal_valid(const struct drm_i915_gem_request *request) +{ + u32 seqno = READ_ONCE(request->global_seqno); + + return seqno == request->signaling.wait.seqno; +} + +static bool signal_complete(const struct drm_i915_gem_request *request) { if (!request) return false; @@ -440,7 +447,7 @@ static bool signal_complete(struct drm_i915_gem_request *request) * signalled that this wait is already completed. */ if (intel_wait_complete(&request->signaling.wait)) - return true; + return signal_valid(request); /* Carefully check if the request is complete, giving time for the * seqno to be visible or if the GPU hung. @@ -518,12 +525,20 @@ static int intel_breadcrumbs_signaler(void *arg) i915_gem_request_put(request); } else { + DEFINE_WAIT(exec); + if (kthread_should_stop()) { GEM_BUG_ON(request); break; } + if (request) + add_wait_queue(&request->execute, &exec); + schedule(); + + if (request) + remove_wait_queue(&request->execute, &exec); } i915_gem_request_put(request); } while (1);