From patchwork Mon Feb 6 17:05:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9558465 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 071AC6021C for ; Mon, 6 Feb 2017 17:05:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ECD5C27F9F for ; Mon, 6 Feb 2017 17:05:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E13A727FA8; Mon, 6 Feb 2017 17:05:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5D74927FA7 for ; Mon, 6 Feb 2017 17:05:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 611B06E4D5; Mon, 6 Feb 2017 17:05:07 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wr0-x241.google.com (mail-wr0-x241.google.com [IPv6:2a00:1450:400c:c0c::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id D36556E4D5 for ; Mon, 6 Feb 2017 17:05:05 +0000 (UTC) Received: by mail-wr0-x241.google.com with SMTP id 89so3415775wrr.1 for ; Mon, 06 Feb 2017 09:05:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:subject:date:message-id; bh=s63iFUxLr1b1M3jaVtnXjp+MIVxbipueFPP9UE4m1bY=; b=oYptjuOwXZSuyTbhCiJ6PnjbXXMxD9bkRh4/CHbl3QhM9UF4iMkcBhljC+y0T2goGg MwYKPSg6Vxlupp/jFjqiYelW4F3oZkL/Cz7tQqZnacouBrZe1IxMAEKW5uXBtVZ5NkSK xQFTmKcaDQPG1YDaLq/e2RV6aznNwIoJJ0/+QTGDEqd53J5hAGEgCjXwAZHgbfz+Oz6P 63ZwyRY7FlyGWHmR/c0hmzCFikyAcnlfsKdq31KGKiXr4u9W67MJSeEt4/FLvn0/LFKo Hw3lWNDAs5fW13pxK+Md6mjyANZEnPG1VGh1zUkRgF6GItiNuBJe5cwJfHzKN/m6OBUl ykug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id; bh=s63iFUxLr1b1M3jaVtnXjp+MIVxbipueFPP9UE4m1bY=; b=Tlcgz8uYvfQWAXxEhIW4kPtbp4jNDL1puuL/cVjKzKnVDDTzJAltds9DAFzk2STWrm 2m3gvV5op4jd+z0B/4l4lOfC1VHYaboWsvrBCoUQ8uo4Tf26ABNx2z4EtyZXCT/hxHa/ 4WyCteVsKXbUbmIl7LqVxsyb2PdwX1MtPgBMziaJcQqUOqgzXkf00hSA13MFLiDXElpD B5gjzzpBUzvgjp8L3ix+V1YUrxel0yOUX7LAdn29tNeTbUseQerNC5YSIvUaVaJtlkmq iJsKnh3bIzq5Lubfj/qYbineopIflUydYdOKB1PymQBVmbexBxCC3+HoQgI5qdHPAnft SmAQ== X-Gm-Message-State: AIkVDXIWBiszwxEyhmSYvzIEBsMIfYPcqpylzplhXNdJGY6+IcE369VJvS+S6RBW0Hxczw== X-Received: by 10.223.163.201 with SMTP id m9mr11609332wrb.66.1486400704197; Mon, 06 Feb 2017 09:05:04 -0800 (PST) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id t123sm13944259wmt.8.2017.02.06.09.05.03 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Feb 2017 09:05:03 -0800 (PST) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Mon, 6 Feb 2017 17:05:01 +0000 Message-Id: <20170206170502.30944-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.11.0 Subject: [Intel-gfx] [CI 1/2] drm/i915: Mark the end of intel_ring_begin() and check in intel_ring_advance() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP It is required that the caller declare the exact number of dwords they wish to write into the ring. This is required for two reasons, we need to allocate sufficient space for the entire command packet and we need to be sure that the contents are completely written to avoid executing stale data. The current interface requires for any bug to be caught in review, the reader has to carefully count the number of intel_ring_emit() between intel_ring_begin() and intel_ring_advance(). If we record the end of the packet of each intel_ring_begin() we can also have CI check for us. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gem.h | 9 +++++++++ drivers/gpu/drm/i915/intel_ringbuffer.c | 1 + drivers/gpu/drm/i915/intel_ringbuffer.h | 3 +++ 3 files changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h index a585d47c420a..412fa2794cbb 100644 --- a/drivers/gpu/drm/i915/i915_gem.h +++ b/drivers/gpu/drm/i915/i915_gem.h @@ -28,9 +28,18 @@ #ifdef CONFIG_DRM_I915_DEBUG_GEM #define GEM_BUG_ON(expr) BUG_ON(expr) #define GEM_WARN_ON(expr) WARN_ON(expr) + +#define GEM_BUG_ONLY(expr) expr +#define GEM_BUG_ONLY_DECLARE(var) var +#define GEM_BUG_ONLY_ON(expr) GEM_BUG_ON(expr) + #else #define GEM_BUG_ON(expr) BUILD_BUG_ON_INVALID(expr) #define GEM_WARN_ON(expr) (BUILD_BUG_ON_INVALID(expr), 0) + +#define GEM_BUG_ONLY(expr) do { } while (0) +#define GEM_BUG_ONLY_DECLARE(var) +#define GEM_BUG_ONLY_ON(expr) #endif #define I915_NUM_ENGINES 5 diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index d32cbba25d98..383083ef2210 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -2238,6 +2238,7 @@ int intel_ring_begin(struct drm_i915_gem_request *req, int num_dwords) ring->space -= bytes; GEM_BUG_ON(ring->space < 0); + GEM_BUG_ONLY(ring->advance = ring->tail + bytes); return 0; } diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index b9c15cd40fbf..2c6d3655985e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -144,6 +144,8 @@ struct intel_ring { u32 head; u32 tail; + GEM_BUG_ONLY_DECLARE(u32 advance); + int space; int size; int effective_size; @@ -516,6 +518,7 @@ static inline void intel_ring_advance(struct intel_ring *ring) * reserved for the command packet (i.e. the value passed to * intel_ring_begin()). */ + GEM_BUG_ONLY_ON(ring->tail != ring->advance); } static inline u32 intel_ring_offset(struct intel_ring *ring, void *addr)