diff mbox

drm/i915: Only apply legacy PDE overflow detection to 3lvl machines

Message ID 20170217135909.14596-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Chris Wilson Feb. 17, 2017, 1:59 p.m. UTC
Prevent the overflow check from firing on machines with the full 4lvl
page tables, that are not restricted to GEN8_LEGACY_PDES.

Fixes: 894ccebee2b0 ("drm/i915: Micro-optimise gen8_ppgtt_insert_entries()")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Ville Syrjala Feb. 17, 2017, 2:07 p.m. UTC | #1
On Fri, Feb 17, 2017 at 01:59:09PM +0000, Chris Wilson wrote:
> Prevent the overflow check from firing on machines with the full 4lvl
> page tables, that are not restricted to GEN8_LEGACY_PDES.
> 
> Fixes: 894ccebee2b0 ("drm/i915: Micro-optimise gen8_ppgtt_insert_entries()")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 1f281554e4c9..65cadc09b56e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -854,7 +854,8 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
>  					break;
>  				}
>  
> -				GEM_BUG_ON(pdpe > GEN8_LEGACY_PDPES);
> +				GEM_BUG_ON(!i915_vm_is_48bit(&ppgtt->base) &&
> +					   pdpe > GEN8_LEGACY_PDPES);

Should that be >= ?

>  				pd = pdp->page_directory[pdpe];
>  				pde = 0;
>  			}
> -- 
> 2.11.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Chris Wilson Feb. 17, 2017, 2:11 p.m. UTC | #2
On Fri, Feb 17, 2017 at 04:07:50PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 17, 2017 at 01:59:09PM +0000, Chris Wilson wrote:
> > Prevent the overflow check from firing on machines with the full 4lvl
> > page tables, that are not restricted to GEN8_LEGACY_PDES.
> > 
> > Fixes: 894ccebee2b0 ("drm/i915: Micro-optimise gen8_ppgtt_insert_entries()")
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 1f281554e4c9..65cadc09b56e 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -854,7 +854,8 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
> >  					break;
> >  				}
> >  
> > -				GEM_BUG_ON(pdpe > GEN8_LEGACY_PDPES);
> > +				GEM_BUG_ON(!i915_vm_is_48bit(&ppgtt->base) &&
> > +					   pdpe > GEN8_LEGACY_PDPES);
> 
> Should that be >= ?

Yes, next you'll be fixing the name ;)
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1f281554e4c9..65cadc09b56e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -854,7 +854,8 @@  gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
 					break;
 				}
 
-				GEM_BUG_ON(pdpe > GEN8_LEGACY_PDPES);
+				GEM_BUG_ON(!i915_vm_is_48bit(&ppgtt->base) &&
+					   pdpe > GEN8_LEGACY_PDPES);
 				pd = pdp->page_directory[pdpe];
 				pde = 0;
 			}