From patchwork Tue Mar 14 14:28:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Hiler X-Patchwork-Id: 9623581 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D3270604CC for ; Tue, 14 Mar 2017 14:28:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C3FDD285A1 for ; Tue, 14 Mar 2017 14:28:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B8FC0285B1; Tue, 14 Mar 2017 14:28:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 57ADE285A1 for ; Tue, 14 Mar 2017 14:28:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C89376E782; Tue, 14 Mar 2017 14:28:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id DBC306E782 for ; Tue, 14 Mar 2017 14:28:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489501718; x=1521037718; h=from:to:subject:date:message-id:in-reply-to:references; bh=XRS5X398hpg0qVnFJs/sCN0X2LR2rxX9yN3COSMyoiQ=; b=qJ4diECYz3QRx1XEqbiKxxMVH9dQNxPd+ORhsbx1pGl3ySdkjHswArV4 ++m8shVspOCAibkWC7ITWW4H+EC3cA==; Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Mar 2017 07:28:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,164,1486454400"; d="scan'208";a="76501544" Received: from ahiler-desk.igk.intel.com ([172.28.171.151]) by fmsmga006.fm.intel.com with ESMTP; 14 Mar 2017 07:28:37 -0700 From: Arkadiusz Hiler To: intel-gfx@lists.freedesktop.org Date: Tue, 14 Mar 2017 15:28:13 +0100 Message-Id: <20170314142815.17440-10-arkadiusz.hiler@intel.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170314142815.17440-1-arkadiusz.hiler@intel.com> References: <20170314142815.17440-1-arkadiusz.hiler@intel.com> Organization: Intel Technology Poland sp. z o.o. - KRS 101882 - ul. Slowackiego 173, 80-298 Gdansk Subject: [Intel-gfx] [PATCH 09/11] drm/i915/uc: Separate firmware selection and preparation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP intel_{h,g}uc_init_fw selects correct firmware and then triggers it's preparation (fetch + initial parsing). This change separates out select steps, so those can be called by the sanitize_options(). Then, during the init_fw(), we prepare the firmware if the firmware was selected. Cc: Michal Winiarski Cc: Joonas Lahtinen Signed-off-by: Arkadiusz Hiler Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_guc_loader.c | 14 +++++--------- drivers/gpu/drm/i915/intel_huc.c | 14 ++------------ drivers/gpu/drm/i915/intel_uc.c | 18 ++++++++++++------ drivers/gpu/drm/i915/intel_uc.h | 4 ++-- 4 files changed, 21 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index d731f68..f8c9e31 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -393,15 +393,12 @@ int intel_guc_init_hw(struct intel_guc *guc) } /** - * intel_guc_init_fw() - select and prepare firmware for loading + * intel_guc_select_fw() - selects GuC firmware for loading * @guc: intel_guc struct * - * Called early during driver load, but after GEM is initialised. - * - * The firmware will be transferred to the GuC's memory later, - * when intel_guc_init_hw() is called. + * Return: zero when we know firmware, non-zero in other case */ -void intel_guc_init_fw(struct intel_guc *guc) +int intel_guc_select_fw(struct intel_guc *guc) { struct drm_i915_private *dev_priv = guc_to_i915(guc); @@ -424,11 +421,10 @@ void intel_guc_init_fw(struct intel_guc *guc) guc->fw.minor_ver_wanted = KBL_FW_MINOR; } else { DRM_ERROR("No GuC firmware known for platform with GuC!\n"); - i915.enable_guc_loading = 0; - return; + return -ENOENT; } - intel_uc_prepare_fw(dev_priv, &guc->fw); + return 0; } /** diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c index 5fadd55..ea67abc 100644 --- a/drivers/gpu/drm/i915/intel_huc.c +++ b/drivers/gpu/drm/i915/intel_huc.c @@ -141,18 +141,10 @@ static int huc_ucode_xfer(struct drm_i915_private *dev_priv) } /** - * intel_huc_init_fw() - select and prepare firmware for loading + * intel_huc_select_fw() - selects HuC firmware for loading * @huc: intel_huc struct - * - * Called early during driver load, but after GEM is initialised. The loading - * will continue only when driver explicitly specify firmware name and version. - * All other cases are considered as INTEL_UC_FIRMWARE_NONE either because HW - * is not capable or driver yet support it. And there will be no error message - * for INTEL_UC_FIRMWARE_NONE cases. - * - * The DMA-copying to HW is done later when intel_huc_init_hw() is called. */ -void intel_huc_init_fw(struct intel_huc *huc) +void intel_huc_select_fw(struct intel_huc *huc) { struct drm_i915_private *dev_priv = huc_to_i915(huc); @@ -177,8 +169,6 @@ void intel_huc_init_fw(struct intel_huc *huc) DRM_ERROR("No HuC firmware known for platform with HuC!\n"); return; } - - intel_uc_prepare_fw(dev_priv, &huc->fw); } /** diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 4b85a0f..eaa2b75 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -66,6 +66,14 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv) if (!i915.enable_guc_loading) i915.enable_guc_submission = 0; } + + if (i915.enable_guc_loading) { + if (HAS_HUC_UCODE(dev_priv)) + intel_huc_select_fw(&dev_priv->huc); + + if (intel_guc_select_fw(&dev_priv->guc)) + i915.enable_guc_loading = 0; + } } void intel_uc_init_early(struct drm_i915_private *dev_priv) @@ -75,13 +83,11 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv) void intel_uc_init_fw(struct drm_i915_private *dev_priv) { - if (!i915.enable_guc_loading) - return; + if (dev_priv->huc.fw.path) + intel_uc_prepare_fw(dev_priv, &dev_priv->huc.fw); - if (HAS_HUC_UCODE(dev_priv)) - intel_huc_init_fw(&dev_priv->huc); - - intel_guc_init_fw(&dev_priv->guc); + if (dev_priv->guc.fw.path) + intel_uc_prepare_fw(dev_priv, &dev_priv->guc.fw); } int intel_uc_init_hw(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 794e6ea..170dd70 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -194,7 +194,7 @@ int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len); int intel_guc_sample_forcewake(struct intel_guc *guc); /* intel_guc_loader.c */ -void intel_guc_init_fw(struct intel_guc *guc); +int intel_guc_select_fw(struct intel_guc *guc); int intel_guc_init_hw(struct intel_guc *guc); void intel_guc_fini(struct drm_i915_private *dev_priv); const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status); @@ -226,7 +226,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) } /* intel_huc.c */ -void intel_huc_init_fw(struct intel_huc *huc); +void intel_huc_select_fw(struct intel_huc *huc); void intel_huc_fini(struct drm_i915_private *dev_priv); int intel_huc_init_hw(struct intel_huc *huc); void intel_guc_auth_huc(struct drm_i915_private *dev_priv);