From patchwork Tue Mar 14 14:28:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Hiler X-Patchwork-Id: 9623573 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C27E4604CC for ; Tue, 14 Mar 2017 14:28:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B1754285A1 for ; Tue, 14 Mar 2017 14:28:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A59B3285B6; Tue, 14 Mar 2017 14:28:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1E428285A1 for ; Tue, 14 Mar 2017 14:28:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 90E876E77B; Tue, 14 Mar 2017 14:28:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4B1736E773 for ; Tue, 14 Mar 2017 14:28:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489501711; x=1521037711; h=from:to:subject:date:message-id:in-reply-to:references; bh=6Icw00Pn8RWCet/itq26J/cDueNCOkAC/N4akIxNG/c=; b=UqNl04uTWFT5PS6H/elVZKAPaCCe+JP0HjpS0/l13n4Ob7BMnzaPxag5 Ee7pUeD1voDbYrS8woeenE25MIVGng==; Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Mar 2017 07:28:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,164,1486454400"; d="scan'208";a="76501487" Received: from ahiler-desk.igk.intel.com ([172.28.171.151]) by fmsmga006.fm.intel.com with ESMTP; 14 Mar 2017 07:28:30 -0700 From: Arkadiusz Hiler To: intel-gfx@lists.freedesktop.org Date: Tue, 14 Mar 2017 15:28:09 +0100 Message-Id: <20170314142815.17440-6-arkadiusz.hiler@intel.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170314142815.17440-1-arkadiusz.hiler@intel.com> References: <20170314142815.17440-1-arkadiusz.hiler@intel.com> Organization: Intel Technology Poland sp. z o.o. - KRS 101882 - ul. Slowackiego 173, 80-298 Gdansk Subject: [Intel-gfx] [PATCH 05/11] drm/i915/uc: Introduce intel_uc_init_fw() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Instead of calling intel_guc_init() and intel_huc_init() one by one this patch introduces intel_uc_init_fw() function that calls them both. Called functions are renamed accordingly. Trying to have subject_verb_object ordering and more descriptive names, the intel_huc_init() and intel_guc_init() functions are renamed. For guc_init(): * `intel_guc` is the subject, so those functions now take intel_guc structure, instead of the dev_priv * init is the verb * fw is the object which better describes the function's role huc_init() change follows the same reasoning. v2: settle on intel_uc_fetch_fw name (M. Wajdeczko) v3: yet another rename - intel_uc_init_fw (J. Lahtinen) v4: non-trivial rebase Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Michal Wajdeczko Cc: Michal Winiarski Signed-off-by: Arkadiusz Hiler Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_drv.c | 3 +-- drivers/gpu/drm/i915/intel_guc_loader.c | 30 ++++++++++++------------- drivers/gpu/drm/i915/intel_huc.c | 39 +++++++++++++++++---------------- drivers/gpu/drm/i915/intel_uc.c | 6 +++++ drivers/gpu/drm/i915/intel_uc.h | 5 +++-- 5 files changed, 45 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 5810604..0fbdcb0 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -605,8 +605,7 @@ static int i915_load_modeset_init(struct drm_device *dev) if (ret) goto cleanup_irq; - intel_huc_init(dev_priv); - intel_guc_init(dev_priv); + intel_uc_init_fw(dev_priv); ret = i915_gem_init(dev_priv); if (ret) diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 383311b..3a37d14 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -521,17 +521,17 @@ int intel_guc_init_hw(struct intel_guc *guc) /** - * intel_guc_init() - define parameters and fetch firmware - * @dev_priv: i915 device private + * intel_guc_init_fw() - select and prepare firmware for loading + * @guc: intel_guc struct * * Called early during driver load, but after GEM is initialised. * * The firmware will be transferred to the GuC's memory later, * when intel_guc_init_hw() is called. */ -void intel_guc_init(struct drm_i915_private *dev_priv) +void intel_guc_init_fw(struct intel_guc *guc) { - struct intel_uc_fw *guc_fw = &dev_priv->guc.fw; + struct drm_i915_private *dev_priv = guc_to_i915(guc); const char *fw_path; if (!HAS_GUC(dev_priv)) { @@ -549,23 +549,23 @@ void intel_guc_init(struct drm_i915_private *dev_priv) fw_path = NULL; } else if (IS_SKYLAKE(dev_priv)) { fw_path = I915_SKL_GUC_UCODE; - guc_fw->major_ver_wanted = SKL_FW_MAJOR; - guc_fw->minor_ver_wanted = SKL_FW_MINOR; + guc->fw.major_ver_wanted = SKL_FW_MAJOR; + guc->fw.minor_ver_wanted = SKL_FW_MINOR; } else if (IS_BROXTON(dev_priv)) { fw_path = I915_BXT_GUC_UCODE; - guc_fw->major_ver_wanted = BXT_FW_MAJOR; - guc_fw->minor_ver_wanted = BXT_FW_MINOR; + guc->fw.major_ver_wanted = BXT_FW_MAJOR; + guc->fw.minor_ver_wanted = BXT_FW_MINOR; } else if (IS_KABYLAKE(dev_priv)) { fw_path = I915_KBL_GUC_UCODE; - guc_fw->major_ver_wanted = KBL_FW_MAJOR; - guc_fw->minor_ver_wanted = KBL_FW_MINOR; + guc->fw.major_ver_wanted = KBL_FW_MAJOR; + guc->fw.minor_ver_wanted = KBL_FW_MINOR; } else { fw_path = ""; /* unknown device */ } - guc_fw->path = fw_path; - guc_fw->fetch_status = INTEL_UC_FIRMWARE_NONE; - guc_fw->load_status = INTEL_UC_FIRMWARE_NONE; + guc->fw.path = fw_path; + guc->fw.fetch_status = INTEL_UC_FIRMWARE_NONE; + guc->fw.load_status = INTEL_UC_FIRMWARE_NONE; /* Early (and silent) return if GuC loading is disabled */ if (!i915.enable_guc_loading) @@ -575,9 +575,9 @@ void intel_guc_init(struct drm_i915_private *dev_priv) if (*fw_path == '\0') return; - guc_fw->fetch_status = INTEL_UC_FIRMWARE_PENDING; + guc->fw.fetch_status = INTEL_UC_FIRMWARE_PENDING; DRM_DEBUG_DRIVER("GuC firmware pending, path %s\n", fw_path); - intel_uc_prepare_fw(dev_priv, guc_fw); + intel_uc_prepare_fw(dev_priv, &guc->fw); /* status must now be FAIL or SUCCESS */ } diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c index 36326ca..fda473d 100644 --- a/drivers/gpu/drm/i915/intel_huc.c +++ b/drivers/gpu/drm/i915/intel_huc.c @@ -141,8 +141,8 @@ static int huc_ucode_xfer(struct drm_i915_private *dev_priv) } /** - * intel_huc_init() - initiate HuC firmware loading request - * @dev_priv: the drm_i915_private device + * intel_huc_init_fw() - select and prepare firmware for loading + * @huc: intel_huc struct * * Called early during driver load, but after GEM is initialised. The loading * will continue only when driver explicitly specify firmware name and version. @@ -152,44 +152,45 @@ static int huc_ucode_xfer(struct drm_i915_private *dev_priv) * * The DMA-copying to HW is done later when intel_huc_init_hw() is called. */ -void intel_huc_init(struct drm_i915_private *dev_priv) +void intel_huc_init_fw(struct intel_huc *huc) { - struct intel_huc *huc = &dev_priv->huc; - struct intel_uc_fw *huc_fw = &huc->fw; + struct drm_i915_private *dev_priv = huc_to_i915(huc); const char *fw_path = NULL; - huc_fw->path = NULL; - huc_fw->fetch_status = INTEL_UC_FIRMWARE_NONE; - huc_fw->load_status = INTEL_UC_FIRMWARE_NONE; - huc_fw->fw = INTEL_UC_FW_TYPE_HUC; + huc->fw.path = NULL; + huc->fw.fetch_status = INTEL_UC_FIRMWARE_NONE; + huc->fw.load_status = INTEL_UC_FIRMWARE_NONE; + huc->fw.fw = INTEL_UC_FW_TYPE_HUC; if (!HAS_HUC_UCODE(dev_priv)) return; if (IS_SKYLAKE(dev_priv)) { fw_path = I915_SKL_HUC_UCODE; - huc_fw->major_ver_wanted = SKL_HUC_FW_MAJOR; - huc_fw->minor_ver_wanted = SKL_HUC_FW_MINOR; + huc->fw.major_ver_wanted = SKL_HUC_FW_MAJOR; + huc->fw.minor_ver_wanted = SKL_HUC_FW_MINOR; } else if (IS_BROXTON(dev_priv)) { fw_path = I915_BXT_HUC_UCODE; - huc_fw->major_ver_wanted = BXT_HUC_FW_MAJOR; - huc_fw->minor_ver_wanted = BXT_HUC_FW_MINOR; + huc->fw.major_ver_wanted = BXT_HUC_FW_MAJOR; + huc->fw.minor_ver_wanted = BXT_HUC_FW_MINOR; } else if (IS_KABYLAKE(dev_priv)) { fw_path = I915_KBL_HUC_UCODE; - huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR; - huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR; + huc->fw.major_ver_wanted = KBL_HUC_FW_MAJOR; + huc->fw.minor_ver_wanted = KBL_HUC_FW_MINOR; } - huc_fw->path = fw_path; + huc->fw.path = fw_path; - if (huc_fw->path == NULL) + if (fw_path == NULL) return; - huc_fw->fetch_status = INTEL_UC_FIRMWARE_PENDING; + huc->fw.fetch_status = INTEL_UC_FIRMWARE_PENDING; DRM_DEBUG_DRIVER("HuC firmware pending, path %s\n", fw_path); - intel_uc_prepare_fw(dev_priv, huc_fw); + WARN(huc->fw.path == NULL, "HuC present but no fw path\n"); + + intel_uc_prepare_fw(dev_priv, &huc->fw); } /** diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 2ea8a2c..e5155de 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -31,6 +31,12 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv) mutex_init(&dev_priv->guc.send_mutex); } +void intel_uc_init_fw(struct drm_i915_private *dev_priv) +{ + intel_huc_init_fw(&dev_priv->huc); + intel_guc_init_fw(&dev_priv->guc); +} + /* * Read GuC command/status register (SOFT_SCRATCH_0) * Return true if it contains a response rather than a command diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 9509432..26d5c6a 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -185,13 +185,14 @@ struct intel_huc { /* intel_uc.c */ void intel_uc_init_early(struct drm_i915_private *dev_priv); +void intel_uc_init_fw(struct drm_i915_private *dev_priv); void intel_uc_prepare_fw(struct drm_i915_private *dev_priv, struct intel_uc_fw *uc_fw); int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len); int intel_guc_sample_forcewake(struct intel_guc *guc); /* intel_guc_loader.c */ -void intel_guc_init(struct drm_i915_private *dev_priv); +void intel_guc_init_fw(struct intel_guc *guc); int intel_guc_init_hw(struct intel_guc *guc); void intel_guc_fini(struct drm_i915_private *dev_priv); const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status); @@ -223,7 +224,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) } /* intel_huc.c */ -void intel_huc_init(struct drm_i915_private *dev_priv); +void intel_huc_init_fw(struct intel_huc *huc); void intel_huc_fini(struct drm_i915_private *dev_priv); int intel_huc_init_hw(struct intel_huc *huc); void intel_guc_auth_huc(struct drm_i915_private *dev_priv);