From patchwork Fri Mar 17 12:59:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9630701 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 61F57602D6 for ; Fri, 17 Mar 2017 12:59:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 483432815E for ; Fri, 17 Mar 2017 12:59:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3B40E285A9; Fri, 17 Mar 2017 12:59:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BBA7B2815E for ; Fri, 17 Mar 2017 12:59:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 607CD6ED19; Fri, 17 Mar 2017 12:59:23 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id C8E1F6E0D2 for ; Fri, 17 Mar 2017 12:59:21 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id u132so3163625wmg.1 for ; Fri, 17 Mar 2017 05:59:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=YUch3Qvs0UAeDJM4lyEwrKbHmxotxF/7Eu471leiliY=; b=MgoURbc7zQZSDle7+rQbjmdo07gYVrerOHQ49RqqHKe2//XXnjhS8N2g8WnafTiyxv yvToEo84mmSkM3817TGQw2TYItAFFCE+aWJuaMXMdEomqFAAC+moa3HiCLNx/p2pAguh DzF7F7MKjzu7gsYPGBsh75T7z954NZPvUv5WvHQ2R3kxHfcJ92ACMQYbNEtCJ/pN7q2F DzfX26Ii0LdIvzTL9GseV1kT2Omasdo0AMxqn/c0QM2sZLYkQHl5jiKOUvJoCHEYynZP dQ8IrSpPBjDqgEYccJW1iOjSVt8RVxQcUnmq1QsFY2AE5ei7SXDu49euAo3q4Apwobat IRUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=YUch3Qvs0UAeDJM4lyEwrKbHmxotxF/7Eu471leiliY=; b=b2+z5derj5hsbkjpwJE59Rj1XiSsBiM6m5/47YHdfU//U2Zz3YiyxSgLAw5Hnwro10 X1VokQiFbusKrEBY7HsYCOXi2Njk5JmJMJPhcjjs2+7XmBfFAgSx4SC7cpuCn4hCGUzq i2bvp+Nyfvvh3NJzLD6q3+eUe9rvgDP8BeVBkhiXp4vQDL1d4QhfHeDHujKhpk+tElBI EAa4+AJVGofXaCpPI5oqSZqRBkKB2QRDPNfR6b7h6EngAMstVEi27PR1I80ItzdE6nWQ eqrq5Dqbvum5dmpDPEcFKFHYE+4Ll9LsNp6od2VqL9tEXBx8Kv2bJCAKXYx9QUcAW+Wi r4BA== X-Gm-Message-State: AFeK/H1ZL+fSE1FKknKnOk9EhI/r0U/OKx5zRTEj4/TCoJLyqFJnoKal0GYOKnLSZ6y1lQ== X-Received: by 10.28.137.211 with SMTP id l202mr2829030wmd.118.1489755560221; Fri, 17 Mar 2017 05:59:20 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id x1sm9826173wrd.63.2017.03.17.05.59.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 Mar 2017 05:59:19 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Fri, 17 Mar 2017 12:59:18 +0000 Message-Id: <20170317125918.11351-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 Cc: Mika Kuoppala Subject: [Intel-gfx] [PATCH] drm/i915: Squelch WARN for VLV_COUNTER_CONTROL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Before rc6 is initialised (after driver load or resume), the value inside VLV_COUNTER_CONTROL is undefined so we cannot make an assertion that is in HIGH_RANGE mode. Fixes: 6b7f6aa75e38 ("drm/i915: Use coarse grained residency counter with byt") Testcase: igt/drv_suspend/debugfs-reader Signed-off-by: Chris Wilson Cc: Ville Syrjälä Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/intel_pm.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d55bf882d1aa..aece0ff88a5d 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8354,22 +8354,24 @@ void intel_pm_setup(struct drm_i915_private *dev_priv) static u64 vlv_residency_raw(struct drm_i915_private *dev_priv, const i915_reg_t reg) { - u32 lower, upper, tmp, saved_ctl; + u32 lower, upper, tmp; /* The register accessed do not need forcewake. We borrow * uncore lock to prevent concurrent access to range reg. */ spin_lock_irq(&dev_priv->uncore.lock); - saved_ctl = I915_READ_FW(VLV_COUNTER_CONTROL); - - if (WARN_ON(!(saved_ctl & VLV_COUNT_RANGE_HIGH))) - I915_WRITE_FW(VLV_COUNTER_CONTROL, - _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH)); /* vlv and chv residency counters are 40 bits in width. * With a control bit, we can choose between upper or lower * 32bit window into this counter. + * + * Although we always use the counter in high-range mode elsewhere, + * userspace may attempt to read the value before rc6 is initialised, + * before we have set the default VLV_COUNTER_CONTROL value. So always + * set the high bit to be safe. */ + I915_WRITE_FW(VLV_COUNTER_CONTROL, + _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH)); upper = I915_READ_FW(reg); do { tmp = upper; @@ -8383,6 +8385,11 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv, upper = I915_READ_FW(reg); } while (upper != tmp); + /* Everywhere else we always use VLV_COUNTER_CONTROL with the + * VLV_COUNT_RANGE_HIGH bit set - so it is safe to leave it set + * now. + */ + spin_unlock_irq(&dev_priv->uncore.lock); return lower | (u64)upper << 8;