@@ -470,7 +470,7 @@ static int run(int seconds,
if (gen < 6)
return IGT_EXIT_SKIP; /* Needs BCS timestamp */
- intel_register_access_init(intel_get_pci_device(), false);
+ intel_register_access_init(intel_get_pci_device(), false, fd);
if (gen == 6)
timestamp_reg = REG(RCS_TIMESTAMP);
@@ -183,7 +183,7 @@ void gem_quiescent_gpu(int fd)
gem_sync(fd, obj.handle);
gem_close(fd, obj.handle);
- igt_drop_caches_set(DROP_RETIRE | DROP_FREED);
+ igt_drop_caches_set(fd, DROP_RETIRE | DROP_FREED);
}
/**
@@ -350,10 +350,10 @@ void igt_stop_signal_helper(void)
}
static struct igt_helper_process shrink_helper;
-static void __attribute__((noreturn)) shrink_helper_process(pid_t pid)
+static void __attribute__((noreturn)) shrink_helper_process(int fd, pid_t pid)
{
while (1) {
- igt_drop_caches_set(DROP_SHRINK_ALL);
+ igt_drop_caches_set(fd, DROP_SHRINK_ALL);
usleep(1000 * 1000 / 50);
if (kill(pid, 0)) /* Parent has died, so must we. */
exit(0);
@@ -370,12 +370,12 @@ static void __attribute__((noreturn)) shrink_helper_process(pid_t pid)
*
* This should only be used from an igt_fixture.
*/
-void igt_fork_shrink_helper(void)
+void igt_fork_shrink_helper(int drm_fd)
{
assert(!igt_only_list_subtests());
- igt_require(igt_drop_caches_has(DROP_SHRINK_ALL));
+ igt_require(igt_drop_caches_has(drm_fd, DROP_SHRINK_ALL));
igt_fork_helper(&shrink_helper)
- shrink_helper_process(getppid());
+ shrink_helper_process(drm_fd, getppid());
}
/**
@@ -51,7 +51,7 @@ extern int num_trash_bos;
void igt_fork_signal_helper(void);
void igt_stop_signal_helper(void);
-void igt_fork_shrink_helper(void);
+void igt_fork_shrink_helper(int fd);
void igt_stop_shrink_helper(void);
void igt_fork_hang_detector(int fd);
@@ -198,7 +198,7 @@ void igt_debug_manual_check(const char *var, const char *expected);
/* These are separate to allow easier testing when porting, see the comment at
* the bottom of intel_os.c. */
-void intel_purge_vm_caches(void);
+void intel_purge_vm_caches(int fd);
uint64_t intel_get_avail_ram_mb(void);
uint64_t intel_get_total_ram_mb(void);
uint64_t intel_get_total_swap_mb(void);
@@ -131,39 +131,34 @@ const char *igt_debugfs_mount(void)
return "/sys/kernel/debug";
}
-static bool __igt_debugfs_init(igt_debugfs_t *debugfs)
+static char *
+igt_get_debugfs_path(int fd)
{
struct stat st;
- int n;
-
- strcpy(debugfs->root, igt_debugfs_mount());
- for (n = 0; n < 16; n++) {
- int len = sprintf(debugfs->dri_path, "%s/dri/%d", debugfs->root, n);
- sprintf(debugfs->dri_path + len, "/i915_error_state");
- if (stat(debugfs->dri_path, &st) == 0) {
- debugfs->dri_path[len] = '\0';
- return true;
- }
- }
-
- debugfs->dri_path[0] = '\0';
- return false;
-}
-
-static igt_debugfs_t *__igt_debugfs_singleton(void)
-{
- static igt_debugfs_t singleton;
- static bool init_done = false;
+ const char *debugfs_root;
+ char *debugfs_dri_path;
+ int len;
- if (init_done)
- return &singleton;
+ if (fstat(fd, &st)) {
+ igt_debug("Couldn't stat FD for DRM device: %s\n", strerror(errno));
+ return NULL;
+ }
- if (__igt_debugfs_init(&singleton)) {
- init_done = true;
- return &singleton;
- } else {
+ if (!S_ISCHR(st.st_mode)) {
+ igt_debug("FD for DRM device not a char device!\n");
return NULL;
}
+
+ debugfs_root = igt_debugfs_mount();
+ debugfs_dri_path = calloc(1, strlen(debugfs_root) + 100);
+ len = sprintf(debugfs_dri_path, "%s/dri/%d", debugfs_root, minor(st.st_rdev));
+ sprintf(debugfs_dri_path + len, "/name");
+ if (stat(debugfs_dri_path, &st) == 0) {
+ debugfs_dri_path[len] = '\0';
+ return debugfs_dri_path;
+ }
+
+ return NULL;
}
/**
@@ -177,15 +172,19 @@ static igt_debugfs_t *__igt_debugfs_singleton(void)
* Returns:
* The Unix file descriptor for the debugfs file or -1 if that didn't work out.
*/
-int igt_debugfs_open(const char *filename, int mode)
+int igt_debugfs_open(int fd, const char *filename, int mode)
{
char buf[1024];
- igt_debugfs_t *debugfs = __igt_debugfs_singleton();
+ char *debugfs_dri_path;
- if (!debugfs)
+ debugfs_dri_path = igt_get_debugfs_path(fd);
+ if (!debugfs_dri_path)
return -1;
- sprintf(buf, "%s/%s", debugfs->dri_path, filename);
+ sprintf(buf, "%s/%s", debugfs_dri_path, filename);
+
+ free(debugfs_dri_path);
+
return open(buf, mode);
}
@@ -200,17 +199,21 @@ int igt_debugfs_open(const char *filename, int mode)
* Returns:
* The libc FILE pointer for the debugfs file or NULL if that didn't work out.
*/
-FILE *igt_debugfs_fopen(const char *filename,
+FILE *igt_debugfs_fopen(int fd,
+ const char *filename,
const char *mode)
{
char buf[1024];
+ char *debugfs_dri_path;
- igt_debugfs_t *debugfs = __igt_debugfs_singleton();
-
- if (!debugfs)
+ debugfs_dri_path = igt_get_debugfs_path(fd);
+ if (!debugfs_dri_path)
return NULL;
- sprintf(buf, "%s/%s", debugfs->dri_path, filename);
+ sprintf(buf, "%s/%s", debugfs_dri_path, filename);
+
+ free(debugfs_dri_path);
+
return fopen(buf, mode);
}
@@ -224,12 +227,12 @@ FILE *igt_debugfs_fopen(const char *filename,
* provided buffer, then closes the file. Users should make sure that the buffer
* provided is big enough to fit the whole file, plus one byte.
*/
-void __igt_debugfs_read(const char *filename, char *buf, int buf_size)
+void __igt_debugfs_read(int fd, const char *filename, char *buf, int buf_size)
{
FILE *file;
size_t n_read;
- file = igt_debugfs_fopen(filename, "r");
+ file = igt_debugfs_fopen(fd, filename, "r");
igt_assert(file);
n_read = fread(buf, 1, buf_size - 1, file);
@@ -250,14 +253,14 @@ void __igt_debugfs_read(const char *filename, char *buf, int buf_size)
*
* Returns: True if the @substring is found to occur in @filename
*/
-bool igt_debugfs_search(const char *filename, const char *substring)
+bool igt_debugfs_search(int fd, const char *filename, const char *substring)
{
FILE *file;
size_t n = 0;
char *line = NULL;
bool matched = false;
- file = igt_debugfs_fopen(filename, "r");
+ file = igt_debugfs_fopen(fd, filename, "r");
igt_assert(file);
while (getline(&line, &n, file) >= 0) {
@@ -322,6 +325,7 @@ char *igt_crc_to_string(igt_crc_t *crc)
#define LEGACY_LINE_LEN (6 * 8 + 5 + 1)
struct _igt_pipe_crc {
+ int fd;
int ctl_fd;
int crc_fd;
int flags;
@@ -370,7 +374,7 @@ static bool igt_pipe_crc_do_start(igt_pipe_crc_t *pipe_crc)
if (!pipe_crc->is_legacy) {
sprintf(buf, "crtc-%d/crc/data", pipe_crc->pipe);
errno = 0;
- pipe_crc->crc_fd = igt_debugfs_open(buf, pipe_crc->flags);
+ pipe_crc->crc_fd = igt_debugfs_open(pipe_crc->fd, buf, pipe_crc->flags);
if (pipe_crc->crc_fd == -1 && errno == EINVAL)
return false;
igt_assert_eq(errno, 0);
@@ -387,23 +391,27 @@ static void igt_pipe_crc_pipe_off(int fd, enum pipe pipe)
igt_assert_eq(write(fd, buf, strlen(buf)), strlen(buf));
}
-static void igt_pipe_crc_reset(void)
+static void igt_pipe_crc_reset(int drm_fd)
{
- igt_debugfs_t *debugfs = __igt_debugfs_singleton();
int fd;
struct dirent *dirent;
char buf[128];
const char *cmd = "none";
bool done = false;
DIR *dir;
+ char *debugfs_dri_path;
+
+ debugfs_dri_path = igt_get_debugfs_path(drm_fd);
+ if (!debugfs_dri_path)
+ return;
- dir = opendir(debugfs->dri_path);
+ dir = opendir(debugfs_dri_path);
if (dir) {
while ((dirent = readdir(dir))) {
if (strcmp(dirent->d_name, "crtc-") != 0)
continue;
- sprintf(buf, "%s/%s/crc/control", debugfs->dri_path,
+ sprintf(buf, "%s/%s/crc/control", debugfs_dri_path,
dirent->d_name);
fd = open(buf, O_WRONLY);
if (fd == -1)
@@ -416,11 +424,12 @@ static void igt_pipe_crc_reset(void)
}
closedir(dir);
}
+ free(debugfs_dri_path);
if (done)
return;
- fd = igt_debugfs_open("i915_display_crc_ctl", O_WRONLY);
+ fd = igt_debugfs_open(drm_fd, "i915_display_crc_ctl", O_WRONLY);
if (fd != -1) {
igt_pipe_crc_pipe_off(fd, PIPE_A);
igt_pipe_crc_pipe_off(fd, PIPE_B);
@@ -432,7 +441,32 @@ static void igt_pipe_crc_reset(void)
static void pipe_crc_exit_handler(int sig)
{
- igt_pipe_crc_reset();
+ struct dirent *dirent;
+ char buf[128];
+ DIR *dir;
+ int fd;
+
+ dir = opendir("/dev/dri");
+ if (!dir)
+ return;
+
+ /*
+ * Try to reset CRC capture for all DRM devices, this is only needed
+ * for the legacy CRC ABI and can be completely removed once the
+ * legacy codepaths are removed.
+ */
+ while ((dirent = readdir(dir))) {
+ if (strncmp(dirent->d_name, "card", 4) != 0)
+ continue;
+
+ sprintf(buf, "/dev/dri/%s", dirent->d_name);
+ fd = open(buf, O_WRONLY);
+
+ igt_pipe_crc_reset(fd);
+
+ close(fd);
+ }
+ closedir(dir);
}
/**
@@ -442,16 +476,16 @@ static void pipe_crc_exit_handler(int sig)
* kernel. Uses igt_skip to automatically skip the test/subtest if this isn't
* the case.
*/
-void igt_require_pipe_crc(void)
+void igt_require_pipe_crc(int fd)
{
const char *cmd = "pipe A none";
FILE *ctl;
size_t written;
int ret;
- ctl = igt_debugfs_fopen("crtc-0/crc/control", "r+");
+ ctl = igt_debugfs_fopen(fd, "crtc-0/crc/control", "r+");
if (!ctl) {
- ctl = igt_debugfs_fopen("i915_display_crc_ctl", "r+");
+ ctl = igt_debugfs_fopen(fd, "i915_display_crc_ctl", "r+");
igt_require_f(ctl,
"No display_crc_ctl found, kernel too old\n");
written = fwrite(cmd, 1, strlen(cmd), ctl);
@@ -463,6 +497,16 @@ void igt_require_pipe_crc(void)
fclose(ctl);
}
+static void igt_hpd_storm_exit_handler(int sig)
+{
+ int fd = drm_open_driver_master(DRIVER_INTEL);
+
+ /* Here we assume that only one i915 device will be ever present */
+ igt_hpd_storm_reset(fd);
+
+ close(fd);
+}
+
/**
* igt_hpd_storm_set_threshold:
* @threshold: How many hotplugs per second required to trigger an HPD storm,
@@ -477,9 +521,9 @@ void igt_require_pipe_crc(void)
*
* See: https://01.org/linuxgraphics/gfx-docs/drm/gpu/i915.html#hotplug
*/
-void igt_hpd_storm_set_threshold(unsigned int threshold)
+void igt_hpd_storm_set_threshold(int drm_fd, unsigned int threshold)
{
- int fd = igt_debugfs_open("i915_hpd_storm_ctl", O_WRONLY);
+ int fd = igt_debugfs_open(drm_fd, "i915_hpd_storm_ctl", O_WRONLY);
char buf[16];
if (fd < 0)
@@ -490,7 +534,7 @@ void igt_hpd_storm_set_threshold(unsigned int threshold)
igt_assert_eq(write(fd, buf, strlen(buf)), strlen(buf));
close(fd);
- igt_install_exit_handler((igt_exit_handler_t)igt_hpd_storm_reset);
+ igt_install_exit_handler(igt_hpd_storm_exit_handler);
}
/**
@@ -506,9 +550,9 @@ void igt_hpd_storm_set_threshold(unsigned int threshold)
*
* See: https://01.org/linuxgraphics/gfx-docs/drm/gpu/i915.html#hotplug
*/
-void igt_hpd_storm_reset(void)
+void igt_hpd_storm_reset(int drm_fd)
{
- int fd = igt_debugfs_open("i915_hpd_storm_ctl", O_WRONLY);
+ int fd = igt_debugfs_open(drm_fd, "i915_hpd_storm_ctl", O_WRONLY);
const char *buf = "reset";
if (fd < 0)
@@ -533,9 +577,9 @@ void igt_hpd_storm_reset(void)
*
* Returns: Whether or not an HPD storm has been detected.
*/
-bool igt_hpd_storm_detected(void)
+bool igt_hpd_storm_detected(int drm_fd)
{
- int fd = igt_debugfs_open("i915_hpd_storm_ctl", O_RDONLY);
+ int fd = igt_debugfs_open(drm_fd, "i915_hpd_storm_ctl", O_RDONLY);
char *start_loc;
char buf[32] = {0}, detected_str[4];
bool ret;
@@ -566,16 +610,16 @@ bool igt_hpd_storm_detected(void)
*
* See: https://01.org/linuxgraphics/gfx-docs/drm/gpu/i915.html#hotplug
*/
-void igt_require_hpd_storm_ctl(void)
+void igt_require_hpd_storm_ctl(int drm_fd)
{
- int fd = igt_debugfs_open("i915_hpd_storm_ctl", O_RDONLY);
+ int fd = igt_debugfs_open(drm_fd, "i915_hpd_storm_ctl", O_RDONLY);
igt_require_f(fd > 0, "No i915_hpd_storm_ctl found in debugfs\n");
close(fd);
}
static igt_pipe_crc_t *
-pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source, int flags)
+pipe_crc_new(int fd, enum pipe pipe, enum intel_pipe_crc_source source, int flags)
{
igt_pipe_crc_t *pipe_crc;
char buf[128];
@@ -585,9 +629,9 @@ pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source, int flags)
pipe_crc = calloc(1, sizeof(struct _igt_pipe_crc));
sprintf(buf, "crtc-%d/crc/control", pipe);
- pipe_crc->ctl_fd = igt_debugfs_open(buf, O_WRONLY);
+ pipe_crc->ctl_fd = igt_debugfs_open(fd, buf, O_WRONLY);
if (pipe_crc->ctl_fd == -1) {
- pipe_crc->ctl_fd = igt_debugfs_open("i915_display_crc_ctl",
+ pipe_crc->ctl_fd = igt_debugfs_open(fd, "i915_display_crc_ctl",
O_WRONLY);
igt_assert(pipe_crc->ctl_fd != -1);
pipe_crc->is_legacy = true;
@@ -595,7 +639,7 @@ pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source, int flags)
if (pipe_crc->is_legacy) {
sprintf(buf, "i915_pipe_%s_crc", kmstest_pipe_name(pipe));
- pipe_crc->crc_fd = igt_debugfs_open(buf, flags);
+ pipe_crc->crc_fd = igt_debugfs_open(fd, buf, flags);
igt_assert(pipe_crc->crc_fd != -1);
igt_debug("Using legacy frame CRC ABI\n");
} else {
@@ -603,6 +647,7 @@ pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source, int flags)
igt_debug("Using generic frame CRC ABI\n");
}
+ pipe_crc->fd = fd;
pipe_crc->pipe = pipe;
pipe_crc->source = source;
pipe_crc->flags = flags;
@@ -623,9 +668,9 @@ pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source, int flags)
* least INTEL_PIPE_CRC_SOURCE_AUTO everywhere.
*/
igt_pipe_crc_t *
-igt_pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source)
+igt_pipe_crc_new(int fd, enum pipe pipe, enum intel_pipe_crc_source source)
{
- return pipe_crc_new(pipe, source, O_RDONLY);
+ return pipe_crc_new(fd, pipe, source, O_RDONLY);
}
/**
@@ -641,9 +686,9 @@ igt_pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source)
* least INTEL_PIPE_CRC_SOURCE_AUTO everywhere.
*/
igt_pipe_crc_t *
-igt_pipe_crc_new_nonblock(enum pipe pipe, enum intel_pipe_crc_source source)
+igt_pipe_crc_new_nonblock(int fd, enum pipe pipe, enum intel_pipe_crc_source source)
{
- return pipe_crc_new(pipe, source, O_RDONLY | O_NONBLOCK);
+ return pipe_crc_new(fd, pipe, source, O_RDONLY | O_NONBLOCK);
}
/**
@@ -879,13 +924,13 @@ void igt_pipe_crc_collect_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out_crc)
* This queries the debugfs to see if it supports the full set of desired
* operations.
*/
-bool igt_drop_caches_has(uint64_t val)
+bool igt_drop_caches_has(int drm_fd, uint64_t val)
{
FILE *file;
uint64_t mask;
mask = 0;
- file = igt_debugfs_fopen("i915_gem_drop_caches", "r");
+ file = igt_debugfs_fopen(drm_fd, "i915_gem_drop_caches", "r");
if (file) {
igt_ignore_warn(fscanf(file, "0x%" PRIx64, &mask));
fclose(file);
@@ -901,7 +946,7 @@ bool igt_drop_caches_has(uint64_t val)
* This calls the debugfs interface the drm/i915 GEM driver exposes to drop or
* evict certain classes of gem buffer objects.
*/
-void igt_drop_caches_set(uint64_t val)
+void igt_drop_caches_set(int drm_fd, uint64_t val)
{
int fd;
char data[19];
@@ -909,7 +954,7 @@ void igt_drop_caches_set(uint64_t val)
sprintf(data, "0x%" PRIx64, val);
- fd = igt_debugfs_open("i915_gem_drop_caches", O_WRONLY);
+ fd = igt_debugfs_open(drm_fd, "i915_gem_drop_caches", O_WRONLY);
igt_assert(fd >= 0);
do {
@@ -975,14 +1020,14 @@ void igt_enable_prefault(void)
igt_prefault_control(true);
}
-static int get_object_count(void)
+static int get_object_count(int fd)
{
FILE *file;
int ret, scanned;
- igt_drop_caches_set(DROP_RETIRE | DROP_ACTIVE | DROP_FREED);
+ igt_drop_caches_set(fd, DROP_RETIRE | DROP_ACTIVE | DROP_FREED);
- file = igt_debugfs_fopen("i915_gem_objects", "r");
+ file = igt_debugfs_fopen(fd, "i915_gem_objects", "r");
scanned = fscanf(file, "%i objects", &ret);
igt_assert_eq(scanned, 1);
@@ -1002,7 +1047,7 @@ int igt_get_stable_obj_count(int driver)
{
int obj_count;
gem_quiescent_gpu(driver);
- obj_count = get_object_count();
+ obj_count = get_object_count(driver);
/* The test relies on the system being in the same state before and
* after the test so any difference in the object count is a result of
* leaks during the test. gem_quiescent_gpu() mostly achieves this but
@@ -1016,7 +1061,7 @@ int igt_get_stable_obj_count(int driver)
while (loop_count < 4) {
usleep(200000);
gem_quiescent_gpu(driver);
- obj_count = get_object_count();
+ obj_count = get_object_count(driver);
if (obj_count == prev_obj_count) {
loop_count++;
} else {
@@ -33,11 +33,11 @@ enum pipe;
const char *igt_debugfs_mount(void);
-int igt_debugfs_open(const char *filename, int mode);
-FILE *igt_debugfs_fopen(const char *filename,
+int igt_debugfs_open(int fd, const char *filename, int mode);
+FILE *igt_debugfs_fopen(int fd, const char *filename,
const char *mode);
-void __igt_debugfs_read(const char *filename, char *buf, int buf_size);
-bool igt_debugfs_search(const char *filename, const char *substring);
+void __igt_debugfs_read(int fd, const char *filename, char *buf, int buf_size);
+bool igt_debugfs_search(int fd, const char *filename, const char *substring);
/**
* igt_debugfs_read:
@@ -47,8 +47,8 @@ bool igt_debugfs_search(const char *filename, const char *substring);
* This is just a convenience wrapper for __igt_debugfs_read. See its
* documentation.
*/
-#define igt_debugfs_read(filename, buf) \
- __igt_debugfs_read((filename), (buf), sizeof(buf))
+#define igt_debugfs_read(fd, filename, buf) \
+ __igt_debugfs_read(fd, (filename), (buf), sizeof(buf))
/*
* Pipe CRC
@@ -116,11 +116,11 @@ enum intel_pipe_crc_source {
void igt_assert_crc_equal(const igt_crc_t *a, const igt_crc_t *b);
char *igt_crc_to_string(igt_crc_t *crc);
-void igt_require_pipe_crc(void);
+void igt_require_pipe_crc(int fd);
igt_pipe_crc_t *
-igt_pipe_crc_new(enum pipe pipe, enum intel_pipe_crc_source source);
+igt_pipe_crc_new(int fd, enum pipe pipe, enum intel_pipe_crc_source source);
igt_pipe_crc_t *
-igt_pipe_crc_new_nonblock(enum pipe pipe, enum intel_pipe_crc_source source);
+igt_pipe_crc_new_nonblock(int fd, enum pipe pipe, enum intel_pipe_crc_source source);
void igt_pipe_crc_free(igt_pipe_crc_t *pipe_crc);
void igt_pipe_crc_start(igt_pipe_crc_t *pipe_crc);
void igt_pipe_crc_stop(igt_pipe_crc_t *pipe_crc);
@@ -129,10 +129,10 @@ int igt_pipe_crc_get_crcs(igt_pipe_crc_t *pipe_crc, int n_crcs,
igt_crc_t **out_crcs);
void igt_pipe_crc_collect_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out_crc);
-void igt_hpd_storm_set_threshold(unsigned int threshold);
-void igt_hpd_storm_reset(void);
-bool igt_hpd_storm_detected(void);
-void igt_require_hpd_storm_ctl(void);
+void igt_hpd_storm_set_threshold(int fd, unsigned int threshold);
+void igt_hpd_storm_reset(int fd);
+bool igt_hpd_storm_detected(int fd);
+void igt_require_hpd_storm_ctl(int fd);
/*
* Drop caches
@@ -188,8 +188,8 @@ void igt_require_hpd_storm_ctl(void);
DROP_ACTIVE | \
DROP_FREED)
-bool igt_drop_caches_has(uint64_t val);
-void igt_drop_caches_set(uint64_t val);
+bool igt_drop_caches_has(int fd, uint64_t val);
+void igt_drop_caches_set(int fd, uint64_t val);
/*
* Prefault control
@@ -360,14 +360,14 @@ void igt_post_hang_ring(int fd, igt_hang_t arg)
* stuck, either because the test manually disabled gpu resets or because the
* test hit an hangcheck bug
*/
-void igt_force_gpu_reset(void)
+void igt_force_gpu_reset(int drm_fd)
{
FILE *file;
int fd, ret, wedged;
igt_debug("Triggering GPU reset\n");
- fd = igt_debugfs_open("i915_wedged", O_RDWR);
+ fd = igt_debugfs_open(drm_fd, "i915_wedged", O_RDWR);
igt_require(fd >= 0);
ret = write(fd, "-1\n", 3);
@@ -375,7 +375,7 @@ void igt_force_gpu_reset(void)
igt_assert_eq(ret, 3);
- file = igt_debugfs_fopen("i915_wedged", "r");
+ file = igt_debugfs_fopen(drm_fd, "i915_wedged", "r");
igt_assert(file);
wedged = 1;
@@ -451,11 +451,11 @@ void igt_stop_hang_helper(void)
* Returns:
* The file descriptor of the forcewake handle or -1 if that didn't work out.
*/
-int igt_open_forcewake_handle(void)
+int igt_open_forcewake_handle(int fd)
{
if (getenv("IGT_NO_FORCEWAKE"))
return -1;
- return igt_debugfs_open("i915_forcewake_user", O_WRONLY);
+ return igt_debugfs_open(fd, "i915_forcewake_user", O_WRONLY);
}
#if defined(__x86_64__) || defined(__i386__)
@@ -543,13 +543,13 @@ unsigned intel_detect_and_clear_missed_interrupts(int fd)
gem_quiescent_gpu(fd);
- file = igt_debugfs_fopen("i915_ring_missed_irq", "r");
+ file = igt_debugfs_fopen(fd, "i915_ring_missed_irq", "r");
if (file) {
igt_assert(fscanf(file, "%x", &missed) == 1);
fclose(file);
}
if (missed) {
- file = igt_debugfs_fopen("i915_ring_missed_irq", "w");
+ file = igt_debugfs_fopen(fd, "i915_ring_missed_irq", "w");
if (file) {
fwrite("0\n", 1, 2, file);
fclose(file);
@@ -51,12 +51,12 @@ igt_hang_t igt_hang_ctx(int fd,
igt_hang_t igt_hang_ring(int fd, int ring);
void igt_post_hang_ring(int fd, igt_hang_t arg);
-void igt_force_gpu_reset(void);
+void igt_force_gpu_reset(int fd);
void igt_fork_hang_helper(void);
void igt_stop_hang_helper(void);
-int igt_open_forcewake_handle(void);
+int igt_open_forcewake_handle(int fd);
int igt_setup_clflush(void);
void igt_clflush_range(void *addr, int size);
@@ -747,7 +747,7 @@ void kmstest_force_edid(int drm_fd, drmModeConnector *connector,
igt_assert_neq(asprintf(&path, "%s-%d/edid_override", kmstest_connector_type_str(connector->connector_type), connector->connector_type_id),
-1);
- debugfs_fd = igt_debugfs_open(path, O_WRONLY | O_TRUNC);
+ debugfs_fd = igt_debugfs_open(drm_fd, path, O_WRONLY | O_TRUNC);
free(path);
igt_assert(debugfs_fd != -1);
@@ -1324,7 +1324,7 @@ static void parse_crtc(char *info, struct kmstest_crtc *crtc)
igt_assert_eq(ret, 2);
}
-void kmstest_get_crtc(enum pipe pipe, struct kmstest_crtc *crtc)
+void kmstest_get_crtc(int fd, enum pipe pipe, struct kmstest_crtc *crtc)
{
char tmp[256];
FILE *fid;
@@ -1333,7 +1333,7 @@ void kmstest_get_crtc(enum pipe pipe, struct kmstest_crtc *crtc)
int line;
long int n;
- fid = igt_debugfs_fopen("i915_display_info", mode);
+ fid = igt_debugfs_fopen(fd, "i915_display_info", mode);
igt_skip_on(fid == NULL);
@@ -1370,13 +1370,13 @@ void kmstest_get_crtc(enum pipe pipe, struct kmstest_crtc *crtc)
igt_skip_on(ncrtc == 0);
}
-void igt_assert_plane_visible(enum pipe pipe, bool visibility)
+void igt_assert_plane_visible(int fd, enum pipe pipe, bool visibility)
{
struct kmstest_crtc crtc;
int i;
bool visible;
- kmstest_get_crtc(pipe, &crtc);
+ kmstest_get_crtc(fd, pipe, &crtc);
visible = true;
for (i = 0; i < crtc.n_planes; i++) {
@@ -215,8 +215,8 @@ uint32_t kmstest_dumb_create(int fd, int width, int height, int bpp,
void *kmstest_dumb_map_buffer(int fd, uint32_t handle, uint64_t size,
unsigned prot);
unsigned int kmstest_get_vblank(int fd, int pipe, unsigned int flags);
-void kmstest_get_crtc(enum pipe pipe, struct kmstest_crtc *crtc);
-void igt_assert_plane_visible(enum pipe pipe, bool visibility);
+void kmstest_get_crtc(int fd, enum pipe pipe, struct kmstest_crtc *crtc);
+void igt_assert_plane_visible(int fd, enum pipe pipe, bool visibility);
/*
* A small modeset API
@@ -36,7 +36,7 @@ extern void *igt_global_mmio;
void intel_mmio_use_pci_bar(struct pci_device *pci_dev);
void intel_mmio_use_dump_file(char *file);
-int intel_register_access_init(struct pci_device *pci_dev, int safe);
+int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
void intel_register_access_fini(void);
uint32_t intel_register_read(uint32_t reg);
void intel_register_write(uint32_t reg, uint32_t val);
@@ -165,7 +165,7 @@ release_forcewake_lock(int fd)
* @pci_dev can be obtained from intel_get_pci_device().
*/
int
-intel_register_access_init(struct pci_device *pci_dev, int safe)
+intel_register_access_init(struct pci_device *pci_dev, int safe, int fd)
{
int ret;
@@ -187,7 +187,7 @@ intel_register_access_init(struct pci_device *pci_dev, int safe)
/* Find where the forcewake lock is. Forcewake doesn't exist
* gen < 6, but the debugfs should do the right things for us.
*/
- ret = igt_open_forcewake_handle();
+ ret = igt_open_forcewake_handle(fd);
if (ret == -1)
mmio_data.key = FAKEKEY;
else
@@ -97,8 +97,11 @@ intel_get_avail_ram_mb(void)
#ifdef HAVE_STRUCT_SYSINFO_TOTALRAM /* Linux */
struct sysinfo sysinf;
+ int fd;
- intel_purge_vm_caches();
+ fd = drm_open_driver(DRIVER_INTEL);
+ intel_purge_vm_caches(fd);
+ close(fd);
igt_assert(sysinfo(&sysinf) == 0);
retval = sysinf.freeram;
@@ -292,11 +295,11 @@ void intel_require_memory(uint64_t count, uint64_t size, unsigned mode)
igt_skip_on_simulation();
}
-void intel_purge_vm_caches(void)
+void intel_purge_vm_caches(int drm_fd)
{
int fd;
- igt_drop_caches_set(DROP_SHRINK_ALL);
+ igt_drop_caches_set(drm_fd, DROP_SHRINK_ALL);
fd = open("/proc/sys/vm/drop_caches", O_WRONLY);
if (fd >= 0) {
@@ -154,7 +154,7 @@ test_basic_hotplug(data_t *data, struct chamelium_port *port)
int i;
reset_state(data, port);
- igt_hpd_storm_set_threshold(0);
+ igt_hpd_storm_set_threshold(data->drm_fd, 0);
for (i = 0; i < 15; i++) {
igt_flush_hotplugs(mon);
@@ -175,7 +175,7 @@ test_basic_hotplug(data_t *data, struct chamelium_port *port)
}
igt_cleanup_hotplug(mon);
- igt_hpd_storm_reset();
+ igt_hpd_storm_reset(data->drm_fd);
}
static void
@@ -536,12 +536,12 @@ test_hpd_storm_detect(data_t *data, struct chamelium_port *port, int width)
struct udev_monitor *mon;
int count = 0;
- igt_require_hpd_storm_ctl();
+ igt_require_hpd_storm_ctl(data->drm_fd);
reset_state(data, port);
- igt_hpd_storm_set_threshold(1);
+ igt_hpd_storm_set_threshold(data->drm_fd, 1);
chamelium_fire_hpd_pulses(data->chamelium, port, width, 10);
- igt_assert(igt_hpd_storm_detected());
+ igt_assert(igt_hpd_storm_detected(data->drm_fd));
mon = igt_watch_hotplug();
chamelium_fire_hpd_pulses(data->chamelium, port, width, 10);
@@ -555,21 +555,21 @@ test_hpd_storm_detect(data_t *data, struct chamelium_port *port, int width)
igt_assert_lt(count, 2);
igt_cleanup_hotplug(mon);
- igt_hpd_storm_reset();
+ igt_hpd_storm_reset(data->drm_fd);
}
static void
test_hpd_storm_disable(data_t *data, struct chamelium_port *port, int width)
{
- igt_require_hpd_storm_ctl();
+ igt_require_hpd_storm_ctl(data->drm_fd);
reset_state(data, port);
- igt_hpd_storm_set_threshold(0);
+ igt_hpd_storm_set_threshold(data->drm_fd, 0);
chamelium_fire_hpd_pulses(data->chamelium, port,
width, 10);
- igt_assert(!igt_hpd_storm_detected());
+ igt_assert(!igt_hpd_storm_detected(data->drm_fd));
- igt_hpd_storm_reset();
+ igt_hpd_storm_reset(data->drm_fd);
}
#define for_each_port(p, port) \
@@ -88,7 +88,7 @@ static void test_error_state_basic(void)
assert_error_state_clear();
/* Manually trigger a hang by request a reset */
- fd = igt_debugfs_open("i915_wedged", O_WRONLY);
+ fd = igt_debugfs_open(device, "i915_wedged", O_WRONLY);
igt_ignore_warn(write(fd, "1\n", 2));
close(fd);
@@ -224,7 +224,7 @@ static void hangcheck_unterminated(void)
gem_execbuf(device, &execbuf);
if (gem_wait(device, handle, &timeout_ns) != 0) {
/* need to manually trigger an hang to clean before failing */
- igt_force_gpu_reset();
+ igt_force_gpu_reset(device);
igt_assert_f(0, "unterminated batch did not trigger an hang!");
}
}
@@ -29,6 +29,8 @@
IGT_TEST_DESCRIPTION("Inject missed interrupts and make sure they are caught");
+static int drm_fd;
+
static void trigger_missed_interrupt(int fd, unsigned ring)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -116,16 +118,16 @@ static uint32_t engine_mask(void)
uint32_t mask;
FILE *file;
- file = igt_debugfs_fopen("i915_ring_test_irq", "w");
+ file = igt_debugfs_fopen(drm_fd, "i915_ring_test_irq", "w");
fprintf(file, "0x%x", -1);
fclose(file);
mask = -1;
- file = igt_debugfs_fopen("i915_ring_test_irq", "r");
+ file = igt_debugfs_fopen(drm_fd, "i915_ring_test_irq", "r");
igt_ignore_warn(fscanf(file, "%x", &mask));
fclose(file);
- file = igt_debugfs_fopen("i915_ring_test_irq", "w");
+ file = igt_debugfs_fopen(drm_fd, "i915_ring_test_irq", "w");
fprintf(file, "0");
fclose(file);
@@ -136,7 +138,7 @@ static void enable_missed_irq(void)
{
FILE *file;
- file = igt_debugfs_fopen("i915_ring_test_irq", "w");
+ file = igt_debugfs_fopen(drm_fd, "i915_ring_test_irq", "w");
fprintf(file, "0x%x", -1);
fclose(file);
}
@@ -146,11 +148,11 @@ static uint32_t disable_missed_irq(void)
FILE *file;
uint32_t mask = 0;
- file = igt_debugfs_fopen("i915_ring_test_irq", "r");
+ file = igt_debugfs_fopen(drm_fd, "i915_ring_test_irq", "r");
igt_ignore_warn(fscanf(file, "%x", &mask));
fclose(file);
- file = igt_debugfs_fopen("i915_ring_test_irq", "w");
+ file = igt_debugfs_fopen(drm_fd, "i915_ring_test_irq", "w");
fprintf(file, "0");
fclose(file);
@@ -163,20 +165,19 @@ igt_simple_main
unsigned expect_rings;
unsigned missed_rings;
unsigned check_rings;
- int fd;
igt_skip_on_simulation();
bind_to_cpu(0);
- fd = drm_open_driver(DRIVER_INTEL);
- igt_require_gem(fd);
- gem_require_mmap_wc(fd);
- igt_fork_hang_detector(fd);
+ drm_fd = drm_open_driver(DRIVER_INTEL);
+ igt_require_gem(drm_fd);
+ gem_require_mmap_wc(drm_fd);
+ igt_fork_hang_detector(drm_fd);
expect_rings = engine_mask();
igt_debug("Clearing rings %x\n", expect_rings);
- intel_detect_and_clear_missed_interrupts(fd);
+ intel_detect_and_clear_missed_interrupts(drm_fd);
for (e = intel_execution_engines; e->name; e++) {
if (expect_rings == -1 && e->exec_id)
continue;
@@ -186,9 +187,9 @@ igt_simple_main
igt_debug("Clearing ring %s [%x]\n",
e->name, e->exec_id | e->flags);
- trigger_missed_interrupt(fd, e->exec_id | e->flags);
+ trigger_missed_interrupt(drm_fd, e->exec_id | e->flags);
}
- igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
+ igt_assert_eq(intel_detect_and_clear_missed_interrupts(drm_fd), 0);
igt_debug("Testing rings %x\n", expect_rings);
enable_missed_irq();
@@ -201,9 +202,9 @@ igt_simple_main
igt_debug("Executing on ring %s [%x]\n",
e->name, e->exec_id | e->flags);
- trigger_missed_interrupt(fd, e->exec_id | e->flags);
+ trigger_missed_interrupt(drm_fd, e->exec_id | e->flags);
}
- missed_rings = intel_detect_and_clear_missed_interrupts(fd);
+ missed_rings = intel_detect_and_clear_missed_interrupts(drm_fd);
check_rings = disable_missed_irq();
igt_assert_eq_u32(check_rings, expect_rings);
@@ -214,5 +215,5 @@ igt_simple_main
igt_assert_eq_u32(missed_rings, expect_rings);
igt_stop_hang_detector();
- close(fd);
+ close(drm_fd);
}
@@ -161,11 +161,11 @@ test_sysfs_reader(bool hibernate)
}
static void
-test_forcewake(bool hibernate)
+test_forcewake(int fd, bool hibernate)
{
int fw_fd;
- fw_fd = igt_open_forcewake_handle();
+ fw_fd = igt_open_forcewake_handle(fd);
igt_assert_lte(0, fw_fd);
if (hibernate)
@@ -200,7 +200,7 @@ igt_main
test_sysfs_reader(false);
igt_subtest("forcewake")
- test_forcewake(false);
+ test_forcewake(fd, false);
igt_subtest("fence-restore-tiled2untiled-hibernate")
test_fence_restore(fd, true, true);
@@ -215,7 +215,7 @@ igt_main
test_sysfs_reader(true);
igt_subtest("forcewake-hibernate")
- test_forcewake(true);
+ test_forcewake(fd, true);
igt_fixture
close(fd);
@@ -1905,7 +1905,7 @@ igt_main
count = num_buffers(gem_mappable_aperture_size(),
s, c, CHECK_RAM);
- igt_fork_shrink_helper();
+ igt_fork_shrink_helper(fd);
}
run_modes(name, c, modes, s, count);
@@ -61,7 +61,7 @@ static bool i915_reset_control(bool enable)
static void trigger_reset(int fd)
{
- igt_force_gpu_reset();
+ igt_force_gpu_reset(fd);
/* And just check the gpu is indeed running again */
igt_debug("Checking that the GPU recovered\n");
@@ -442,9 +442,9 @@ igt_main
int device = -1;
igt_fixture {
- intel_register_access_init(intel_get_pci_device(), false);
device = drm_open_driver(DRIVER_INTEL);
igt_require_gem(device);
+ intel_register_access_init(intel_get_pci_device(), false, device);
print_welcome(device);
ring_size = measure_ring_size(device);
@@ -526,7 +526,7 @@ igt_main
#undef REG
igt_fixture {
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, fd);
}
for (int i = 0; i < ARRAY_SIZE(lris); i++) {
@@ -41,12 +41,12 @@
#define VERIFY 0
-static void write_seqno(unsigned offset)
+static void write_seqno(int fd, unsigned offset)
{
uint32_t seqno = UINT32_MAX - offset;
FILE *file;
- file = igt_debugfs_fopen("i915_next_seqno", "w");
+ file = igt_debugfs_fopen(fd, "i915_next_seqno", "w");
igt_assert(file);
igt_assert(fprintf(file, "0x%x", seqno) > 0);
@@ -337,7 +337,7 @@ static void whisper(int fd, unsigned engine, unsigned flags)
uint64_t offset;
if (!(flags & FORKED))
- write_seqno(pass);
+ write_seqno(fd, pass);
if (flags & HANG)
submit_hang(&hang, engines, nengine);
@@ -383,7 +383,7 @@ static void default_context_tests(unsigned mode)
switch (mode) {
case NONE: break;
- case RESET: igt_force_gpu_reset(); break;
+ case RESET: igt_force_gpu_reset(fd); break;
case SUSPEND: igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
SUSPEND_TEST_NONE); break;
case HIBERNATE: igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
@@ -424,7 +424,7 @@ static void default_dirty_tests(unsigned mode)
switch (mode) {
case NONE: break;
- case RESET: igt_force_gpu_reset(); break;
+ case RESET: igt_force_gpu_reset(fd); break;
case SUSPEND: igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
SUSPEND_TEST_NONE); break;
case HIBERNATE: igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
@@ -449,7 +449,7 @@ static void context_save_restore_test(unsigned mode)
switch (mode) {
case NONE: break;
- case RESET: igt_force_gpu_reset(); break;
+ case RESET: igt_force_gpu_reset(fd); break;
case SUSPEND: igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
SUSPEND_TEST_NONE); break;
case HIBERNATE: igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
@@ -494,7 +494,7 @@ static void context_dirty_test(unsigned mode)
switch (mode) {
case NONE: break;
- case RESET: igt_force_gpu_reset(); break;
+ case RESET: igt_force_gpu_reset(fd); break;
case SUSPEND: igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
SUSPEND_TEST_NONE); break;
case HIBERNATE: igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
@@ -514,10 +514,14 @@ static void context_dirty_test(unsigned mode)
static void run_tests(unsigned mode)
{
struct pci_device *pci_dev;
+ int fd;
pci_dev = intel_get_pci_device();
igt_require(pci_dev);
- intel_register_access_init(pci_dev, 0);
+
+ fd = drm_open_driver_master(DRIVER_INTEL);
+ intel_register_access_init(pci_dev, 0, fd);
+ close(fd);
default_context_tests(mode);
default_dirty_tests(mode);
@@ -288,7 +288,7 @@ static void do_forked_test(int fd, unsigned flags)
igt_fork_helper(&thrasher) {
while (1) {
usleep(1000);
- igt_drop_caches_set(val);
+ igt_drop_caches_set(fd, val);
}
}
}
@@ -236,7 +236,7 @@ static void flink_and_close(void)
gem_sync(fd2, flinked_bo);
gem_close(fd2, flinked_bo);
- igt_drop_caches_set(DROP_RETIRE);
+ igt_drop_caches_set(fd, DROP_RETIRE);
/* the flinked bo VMA should have been cleared now, so a new bo of the
* same size should get the same offset
@@ -269,12 +269,12 @@ static void flink_and_exit(void)
flinked_bo = gem_open(fd2, name);
/* Verify VMA is not there yet. */
- igt_assert(!igt_debugfs_search("i915_gem_gtt", match));
+ igt_assert(!igt_debugfs_search(fd, "i915_gem_gtt", match));
exec_and_get_offset(fd2, flinked_bo);
/* Verify VMA has been created. */
- igt_assert(igt_debugfs_search("i915_gem_gtt", match));
+ igt_assert(igt_debugfs_search(fd, "i915_gem_gtt", match));
/* Close the context. */
close(fd2);
@@ -286,8 +286,8 @@ static void flink_and_exit(void)
exec_and_get_offset(fd3, gem_create(fd3, 4096));
close(fd3);
- igt_drop_caches_set(DROP_ACTIVE | DROP_RETIRE);
- igt_assert(!igt_debugfs_search("i915_gem_gtt", match));
+ igt_drop_caches_set(fd, DROP_ACTIVE | DROP_RETIRE);
+ igt_assert(!igt_debugfs_search(fd, "i915_gem_gtt", match));
close(fd);
}
@@ -265,7 +265,7 @@ static void do_forked_test(int fd, unsigned flags)
igt_fork_helper(&thrasher) {
while (1) {
usleep(1000);
- igt_drop_caches_set(val);
+ igt_drop_caches_set(fd, val);
}
}
}
@@ -204,7 +204,7 @@ igt_main
}
igt_subtest("aperture-shrink") {
- igt_fork_shrink_helper();
+ igt_fork_shrink_helper(fd);
count = 3 * gem_aperture_size(fd) / SIZE / 2;
intel_require_memory(count, SIZE, CHECK_RAM);
@@ -217,7 +217,7 @@ igt_main
}
igt_subtest("aperture-shrink") {
- igt_fork_shrink_helper();
+ igt_fork_shrink_helper(fd);
count = 3 * gem_aperture_size(fd) / SIZE / 2;
intel_require_memory(count, SIZE, CHECK_RAM);
@@ -47,6 +47,7 @@
IGT_TEST_DESCRIPTION("Runs blitcopy -> rendercopy with multiple buffers over"
" wrap boundary.");
+static int drm_fd;
static int devid;
static int card_index = 0;
static uint32_t last_seqno = 0;
@@ -174,26 +175,25 @@ static void run_sync_test(int num_buffers, bool verify)
int max;
drm_intel_bo **src, **dst1, **dst2;
int width = 128, height = 128;
- int fd;
int i;
unsigned int *p_dst1, *p_dst2;
struct igt_buf *s_src, *s_dst;
- fd = drm_open_driver(DRIVER_INTEL);
+ drm_fd = drm_open_driver(DRIVER_INTEL);
- gem_quiescent_gpu(fd);
+ gem_quiescent_gpu(drm_fd);
- devid = intel_get_drm_devid(fd);
+ devid = intel_get_drm_devid(drm_fd);
- max = gem_aperture_size (fd) / (1024 * 1024) / 2;
+ max = gem_aperture_size (drm_fd) / (1024 * 1024) / 2;
if (num_buffers > max)
num_buffers = max;
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
+ bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
- batch_blt = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+ batch_blt = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(drm_fd));
igt_assert(batch_blt);
- batch_3d = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+ batch_3d = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(drm_fd));
igt_assert(batch_3d);
src = malloc(num_buffers * sizeof(*src));
@@ -265,9 +265,9 @@ static void run_sync_test(int num_buffers, bool verify)
free(dst1);
free(src);
- gem_quiescent_gpu(fd);
+ gem_quiescent_gpu(drm_fd);
- close(fd);
+ close(drm_fd);
}
static int __read_seqno(uint32_t *seqno)
@@ -278,7 +278,7 @@ static int __read_seqno(uint32_t *seqno)
char *p;
unsigned long int tmp;
- fh = igt_debugfs_open("i915_next_seqno", O_RDONLY);
+ fh = igt_debugfs_open(drm_fd, "i915_next_seqno", O_RDONLY);
r = read(fh, buf, sizeof(buf) - 1);
close(fh);
@@ -332,7 +332,7 @@ static void write_seqno(uint32_t seqno)
if (options.dontwrap)
return;
- fd = igt_debugfs_open("i915_next_seqno", O_RDWR);
+ fd = igt_debugfs_open(drm_fd, "i915_next_seqno", O_RDWR);
len = snprintf(buf, sizeof(buf), "0x%x", seqno);
igt_assert(write(fd, buf, len) == len);
close(fd);
@@ -155,9 +155,9 @@ static void thread_fini(struct thread *t)
free(t->idx_arr);
}
-static void check_memory_layout(void)
+static void check_memory_layout(int fd)
{
- igt_skip_on_f(igt_debugfs_search("i915_swizzle_info", "L-shaped"),
+ igt_skip_on_f(igt_debugfs_search(fd, "i915_swizzle_info", "L-shaped"),
"L-shaped memory configuration detected\n");
igt_debug("normal memory configuration detected, continuing\n");
@@ -173,11 +173,10 @@ igt_main
current_tiling_mode = I915_TILING_X;
- intel_purge_vm_caches();
-
fd = drm_open_driver(DRIVER_INTEL);
- check_memory_layout();
+ intel_purge_vm_caches(fd);
+ check_memory_layout(fd);
/* lock RAM, leaving only 512MB available */
lock_size = max(0, intel_get_total_ram_mb() - AVAIL_RAM);
@@ -133,9 +133,9 @@ igt_main
pci_dev = intel_get_pci_device();
igt_require(pci_dev);
- intel_register_access_init(pci_dev, 0);
+ intel_register_access_init(pci_dev, 0, fd);
- file = igt_debugfs_fopen("i915_wa_registers", "r");
+ file = igt_debugfs_fopen(fd, "i915_wa_registers", "r");
igt_assert(getline(&line, &line_size, file) > 0);
igt_debug("i915_wa_registers: %s", line);
sscanf(line, "Workarounds applied: %d", &num_wa_regs);
@@ -675,7 +675,7 @@ static void run_modeset_tests(igt_display_t *display, int howmany, bool nonblock
drmModeModeInfo *mode = NULL;
if (is_i915_device(display->drm_fd))
- pipe_crcs[i] = igt_pipe_crc_new(i, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crcs[i] = igt_pipe_crc_new(display->drm_fd, i, INTEL_PIPE_CRC_SOURCE_AUTO);
for_each_valid_output_on_pipe(display, i, output) {
if (output->pending_crtc_idx_mask)
@@ -212,7 +212,7 @@ static void test_output(data_t *data)
igt_output_set_pipe(data->output, data->pipe);
if (data->flags & TEST_CRC) {
- pipe_crc = igt_pipe_crc_new(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
display_fb(data, TEST_COMPRESSED);
igt_pipe_crc_collect_crc(pipe_crc, &ref_crc);
@@ -276,7 +276,7 @@ igt_main
igt_require(intel_gen(intel_get_drm_devid(data.drm_fd)) >= 9);
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -254,7 +254,7 @@ static void prepare_crtc(data_t *data)
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new_nonblock(data->pipe,
+ data->pipe_crc = igt_pipe_crc_new_nonblock(data->drm_fd, data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* make sure cursor is disabled */
@@ -374,7 +374,7 @@ int main(int argc, char **argv)
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -85,7 +85,7 @@ static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,
/* create the pipe_crc object for this pipe */
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->gfx_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
mode = igt_output_get_mode(output);
@@ -179,7 +179,7 @@ igt_simple_main
igt_skip_on_simulation();
data.gfx_fd = drm_open_driver(DRIVER_INTEL);
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.gfx_fd);
igt_display_init(&data.display, data.gfx_fd);
test_crtc_background(&data);
@@ -310,7 +310,7 @@ static void prepare_crtc(data_t *data, igt_output_t *output,
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(data->pipe,
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* x/y position where the cursor is still fully visible */
@@ -602,7 +602,7 @@ igt_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -1264,7 +1264,7 @@ static void flip_vs_cursor_crc(igt_display_t *display, bool atomic)
igt_display_commit2(display, display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
- pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crc = igt_pipe_crc_new(display->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
set_cursor_on_pipe(display, pipe, &cursor_fb);
igt_display_commit2(display, COMMIT_UNIVERSAL);
@@ -1326,7 +1326,7 @@ static void flip_vs_cursor_busy_crc(igt_display_t *display, bool atomic)
igt_display_commit2(display, display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
- pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crc = igt_pipe_crc_new(display->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
set_cursor_on_pipe(display, pipe, &cursor_fb);
igt_display_commit2(display, COMMIT_UNIVERSAL);
@@ -232,7 +232,7 @@ static void setup_environment(void)
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
find_modeset_params();
- pipe_crc = igt_pipe_crc_new(kmstest_get_crtc_idx(drm_res, ms.crtc_id),
+ pipe_crc = igt_pipe_crc_new(drm_fd, kmstest_get_crtc_idx(drm_res, ms.crtc_id),
INTEL_PIPE_CRC_SOURCE_AUTO);
}
@@ -211,7 +211,7 @@ static bool fbc_enabled(data_t *data)
{
char str[128] = {};
- igt_debugfs_read("i915_fbc_status", str);
+ igt_debugfs_read(data->drm_fd, "i915_fbc_status", str);
return strstr(str, "FBC enabled") != NULL;
}
@@ -378,7 +378,7 @@ static bool prepare_test(data_t *data, enum test_mode test_mode)
igt_pipe_crc_free(data->pipe_crc);
data->pipe_crc = NULL;
- pipe_crc = igt_pipe_crc_new(data->pipe,
+ pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
data->pipe_crc = pipe_crc;
@@ -530,9 +530,9 @@ igt_main
data.devid = intel_get_drm_devid(data.drm_fd);
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(data.drm_fd, "i915_fbc_status", buf);
igt_require_f(!strstr(buf, "unsupported on this chipset"),
"FBC not supported\n");
@@ -82,11 +82,11 @@ static void teardown_drm(struct drm_info *drm)
igt_assert(close(drm->fd) == 0);
}
-static bool fbc_supported_on_chipset(void)
+static bool fbc_supported_on_chipset(int fd)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(fd, "i915_fbc_status", buf);
return !strstr(buf, "FBC unsupported on this chipset\n");
}
@@ -95,17 +95,17 @@ static bool connector_can_fbc(drmModeConnectorPtr connector)
return true;
}
-static bool fbc_is_enabled(void)
+static bool fbc_is_enabled(int fd)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(fd, "i915_fbc_status", buf);
return strstr(buf, "FBC enabled\n");
}
-static bool fbc_wait_until_enabled(void)
+static bool fbc_wait_until_enabled(int fd)
{
- return igt_wait(fbc_is_enabled(), 5000, 1);
+ return igt_wait(fbc_is_enabled(fd), 5000, 1);
}
typedef bool (*connector_possible_fn)(drmModeConnectorPtr connector);
@@ -147,11 +147,11 @@ static void set_mode_for_one_screen(struct drm_info *drm, struct igt_fb *fb,
igt_assert_eq(rc, 0);
}
-static bool psr_supported_on_chipset(void)
+static bool psr_supported_on_chipset(int fd)
{
char buf[256];
- igt_debugfs_read("i915_edp_psr_status", buf);
+ igt_debugfs_read(fd, "i915_edp_psr_status", buf);
return strstr(buf, "Sink_Support: yes\n");
}
@@ -160,22 +160,22 @@ static bool connector_can_psr(drmModeConnectorPtr connector)
return (connector->connector_type == DRM_MODE_CONNECTOR_eDP);
}
-static bool psr_is_enabled(void)
+static bool psr_is_enabled(int fd)
{
char buf[256];
- igt_debugfs_read("i915_edp_psr_status", buf);
+ igt_debugfs_read(fd, "i915_edp_psr_status", buf);
return strstr(buf, "\nActive: yes\n");
}
-static bool psr_wait_until_enabled(void)
+static bool psr_wait_until_enabled(int fd)
{
- return igt_wait(psr_is_enabled(), 5000, 1);
+ return igt_wait(psr_is_enabled(fd), 5000, 1);
}
struct feature {
- bool (*supported_on_chipset)(void);
- bool (*wait_until_enabled)(void);
+ bool (*supported_on_chipset)(int fd);
+ bool (*wait_until_enabled)(int fd);
bool (*connector_possible_fn)(drmModeConnectorPtr connector);
const char *param_name;
} fbc = {
@@ -201,26 +201,26 @@ static void subtest(struct feature *feature, bool suspend)
struct drm_info drm;
struct igt_fb fb;
- igt_require(feature->supported_on_chipset());
+ setup_drm(&drm);
+
+ igt_require(feature->supported_on_chipset(drm.fd));
disable_features();
igt_set_module_param_int(feature->param_name, 1);
- setup_drm(&drm);
-
kmstest_unset_all_crtcs(drm.fd, drm.res);
wait_user("Modes unset.");
- igt_assert(!feature->wait_until_enabled());
+ igt_assert(!feature->wait_until_enabled(drm.fd));
set_mode_for_one_screen(&drm, &fb, feature->connector_possible_fn);
wait_user("Screen set.");
- igt_assert(feature->wait_until_enabled());
+ igt_assert(feature->wait_until_enabled(drm.fd));
if (suspend) {
igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
SUSPEND_TEST_NONE);
sleep(5);
- igt_assert(feature->wait_until_enabled());
+ igt_assert(feature->wait_until_enabled(drm.fd));
}
igt_remove_fb(drm.fd, &fb);
@@ -230,13 +230,13 @@ static void subtest(struct feature *feature, bool suspend)
sleep(3);
wait_user("Back to fbcon.");
- igt_assert(!feature->wait_until_enabled());
+ igt_assert(!feature->wait_until_enabled(drm.fd));
if (suspend) {
igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
SUSPEND_TEST_NONE);
sleep(5);
- igt_assert(!feature->wait_until_enabled());
+ igt_assert(!feature->wait_until_enabled(drm.fd));
}
}
@@ -41,14 +41,14 @@ typedef struct {
static igt_pipe_crc_t *_pipe_crc;
-static igt_pipe_crc_t *pipe_crc_new(int pipe)
+static igt_pipe_crc_t *pipe_crc_new(data_t *data, int pipe)
{
if (_pipe_crc) {
igt_pipe_crc_free(_pipe_crc);
_pipe_crc = NULL;
}
- _pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ _pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
igt_assert(_pipe_crc);
return _pipe_crc;
@@ -89,7 +89,7 @@ test_flip_tiling(data_t *data, enum pipe pipe, igt_output_t *output, uint64_t ti
igt_crc_t reference_crc, crc;
int fb_id, ret, width;
- pipe_crc = pipe_crc_new(pipe);
+ pipe_crc = pipe_crc_new(data, pipe);
igt_output_set_pipe(output, pipe);
mode = igt_output_get_mode(output);
@@ -168,7 +168,7 @@ igt_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -781,7 +781,7 @@ static bool fbc_is_enabled(void)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
return strstr(buf, "FBC enabled\n");
}
@@ -789,7 +789,7 @@ static void fbc_print_status(void)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
igt_info("FBC status:\n%s\n", buf);
}
@@ -797,7 +797,7 @@ static bool psr_is_enabled(void)
{
char buf[256];
- igt_debugfs_read("i915_edp_psr_status", buf);
+ igt_debugfs_read(drm.fd, "i915_edp_psr_status", buf);
return strstr(buf, "\nActive: yes\n") &&
strstr(buf, "\nHW Enabled & Active bit: yes\n");
}
@@ -806,7 +806,7 @@ static void psr_print_status(void)
{
char buf[256];
- igt_debugfs_read("i915_edp_psr_status", buf);
+ igt_debugfs_read(drm.fd, "i915_edp_psr_status", buf);
igt_info("PSR status:\n%s\n", buf);
}
@@ -817,7 +817,7 @@ static struct timespec fbc_get_last_action(void)
char *action;
ssize_t n_read;
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
action = strstr(buf, "\nLast action:");
igt_assert(action);
@@ -866,7 +866,7 @@ static void fbc_setup_last_action(void)
char buf[128];
char *action;
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
action = strstr(buf, "\nLast action:");
if (!action) {
@@ -885,7 +885,7 @@ static bool fbc_is_compressing(void)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
return strstr(buf, "\nCompressing: yes\n") != NULL;
}
@@ -898,7 +898,7 @@ static bool fbc_not_enough_stolen(void)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
return strstr(buf, "FBC disabled: not enough stolen memory\n");
}
@@ -906,7 +906,7 @@ static bool fbc_stride_not_supported(void)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
return strstr(buf, "FBC disabled: framebuffer stride not supported\n");
}
@@ -1420,7 +1420,7 @@ static void setup_sink_crc(void)
fill_fb_region(&prim_mode_params.fb, COLOR_PRIM_BG);
set_mode_for_params(&prim_mode_params);
- sink_crc.fd = igt_debugfs_open("i915_sink_crc_eDP1", O_RDONLY);
+ sink_crc.fd = igt_debugfs_open(drm.fd, "i915_sink_crc_eDP1", O_RDONLY);
igt_assert_lte(0, sink_crc.fd);
/* Do a first read to try to detect if it's supported. */
@@ -1432,7 +1432,7 @@ static void setup_crcs(void)
enum pixel_format f;
int crtc_idx = kmstest_get_crtc_idx(drm.res, prim_mode_params.crtc_id);
- pipe_crc = igt_pipe_crc_new(crtc_idx, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crc = igt_pipe_crc_new(drm.fd, crtc_idx, INTEL_PIPE_CRC_SOURCE_AUTO);
setup_sink_crc();
@@ -1497,7 +1497,7 @@ static bool fbc_supported_on_chipset(void)
{
char buf[128];
- igt_debugfs_read("i915_fbc_status", buf);
+ igt_debugfs_read(drm.fd, "i915_fbc_status", buf);
return !strstr(buf, "FBC unsupported on this chipset\n");
}
@@ -1533,7 +1533,7 @@ static bool psr_sink_has_support(void)
{
char buf[256];
- igt_debugfs_read("i915_edp_psr_status", buf);
+ igt_debugfs_read(drm.fd, "i915_edp_psr_status", buf);
return strstr(buf, "Sink_Support: yes\n");
}
@@ -104,13 +104,13 @@ static void test(data_t *data)
igt_require_f(valid_connectors, "No suitable connectors found\n");
}
-static int i915_max_dotclock(void)
+static int i915_max_dotclock(data_t *data)
{
char buf[4096];
char *s;
int max_dotclock = 0;
- igt_debugfs_read("i915_frequency_info", buf);
+ igt_debugfs_read(data->drm_fd, "i915_frequency_info", buf);
s = strstr(buf, "Max pixel clock frequency:");
igt_assert(s);
igt_assert_eq(sscanf(s, "Max pixel clock frequency: %d kHz", &max_dotclock), 1);
@@ -137,7 +137,7 @@ igt_simple_main
data.res = drmModeGetResources(data.drm_fd);
kmstest_unset_all_crtcs(data.drm_fd, data.res);
- data.max_dotclock = i915_max_dotclock();
+ data.max_dotclock = i915_max_dotclock(&data);
igt_info("Max dotclock: %d kHz\n", data.max_dotclock);
test(&data);
@@ -185,7 +185,7 @@ static void prepare_crtc(data_t *data)
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(data->pipe,
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* get reference crc for the white fb */
@@ -277,7 +277,7 @@ int main(int argc, char **argv)
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
@@ -235,7 +235,7 @@ test_plane(data_t *data, igt_output_t *output, enum pipe pipe, int plane)
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
/* set red fb and grab reference crc */
igt_plane_set_fb(primary, &red_fb);
@@ -374,7 +374,7 @@ test_crtc(data_t *data, igt_output_t *output, enum pipe pipe)
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
/* set red fb and grab reference crc */
igt_plane_set_fb(primary, &red_fb);
@@ -497,7 +497,7 @@ igt_main
data.devid = intel_get_drm_devid(data.drm_fd);
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
@@ -852,7 +852,7 @@ run_tests_for_pipe(data_t *data, enum pipe p)
igt_fixture {
int valid_tests = 0;
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data->drm_fd);
igt_require(p < data->display.n_pipes);
@@ -861,7 +861,8 @@ run_tests_for_pipe(data_t *data, enum pipe p)
primary = igt_pipe_get_plane_type(pipe, DRM_PLANE_TYPE_PRIMARY);
- data->pipe_crc = igt_pipe_crc_new(primary->pipe->pipe,
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd,
+ primary->pipe->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
igt_require(igt_pipe_get_property(&data->display.pipes[p],
@@ -48,7 +48,7 @@ static void test_bad_command(data_t *data, const char *cmd)
FILE *ctl;
size_t written;
- ctl = igt_debugfs_fopen("i915_display_crc_ctl", "r+");
+ ctl = igt_debugfs_fopen(data->drm_fd, "i915_display_crc_ctl", "r+");
igt_require(ctl);
written = fwrite(cmd, 1, strlen(cmd), ctl);
@@ -66,7 +66,7 @@ static void test_bad_source(data_t *data)
size_t written;
const char *source = "foo";
- f = igt_debugfs_fopen("crtc-0/crc/control", "w");
+ f = igt_debugfs_fopen(data->drm_fd, "crtc-0/crc/control", "w");
if (!f) {
test_bad_command(data, "pipe A foo");
return;
@@ -79,7 +79,7 @@ static void test_bad_source(data_t *data)
igt_assert(!errno);
fclose(f);
- f = igt_debugfs_fopen("crtc-0/crc/data", "w");
+ f = igt_debugfs_fopen(data->drm_fd, "crtc-0/crc/data", "w");
igt_assert(!f);
igt_assert_eq(errno, EINVAL);
}
@@ -127,7 +127,7 @@ test_read_crc_for_output(data_t *data, int pipe, igt_output_t *output,
if (flags & TEST_NONBLOCK) {
igt_pipe_crc_t *pipe_crc;
- pipe_crc = igt_pipe_crc_new_nonblock(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crc = igt_pipe_crc_new_nonblock(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
igt_wait_for_vblank(data->drm_fd, pipe);
igt_pipe_crc_start(pipe_crc);
@@ -141,7 +141,7 @@ test_read_crc_for_output(data_t *data, int pipe, igt_output_t *output,
} else {
igt_pipe_crc_t *pipe_crc;
- pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
igt_pipe_crc_start(pipe_crc);
n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS, &crcs);
@@ -213,7 +213,7 @@ igt_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -52,7 +52,7 @@ static color_t blue = { 0.0f, 0.0f, 1.0f };
*/
static void test_init(data_t *data, enum pipe pipe)
{
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
}
static void test_fini(data_t *data)
@@ -430,7 +430,7 @@ igt_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -112,7 +112,7 @@ get_lowres_mode(int drmfd, drmModeModeInfo *mode_default)
static void
test_init(data_t *data, enum pipe pipe)
{
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
data->plane = calloc(data->display.pipes[pipe].n_planes, sizeof(data->plane));\
igt_assert_f(data->plane, "Failed to allocate memory for %d planes\n",
data->display.pipes[pipe].n_planes);
@@ -189,11 +189,9 @@ test_setup(data_t *data, enum pipe pipe, uint64_t modifier, int flags,
int size;
int i, x, y;
- crtc.planes = calloc(sizeof(struct kmstest_plane), data->display.pipes[pipe].n_planes);
- igt_assert_f(crtc.planes, "Failed to allocate memory for %d planes\n", data->display.pipes[pipe].n_planes);
igt_output_set_pipe(output, pipe);
- kmstest_get_crtc(pipe, &crtc);
+ kmstest_get_crtc(data->drm_fd, pipe, &crtc);
igt_skip_on(crtc.n_planes > data->display.pipes[pipe].n_planes);
igt_skip_on(crtc.n_planes == 0);
@@ -263,7 +261,7 @@ test_plane_position_with_output(data_t *data, enum pipe pipe,
n = igt_pipe_crc_get_crcs(data->pipe_crc, 1, &crc_hires1);
igt_assert_eq(1, n);
- igt_assert_plane_visible(pipe, true);
+ igt_assert_plane_visible(data->drm_fd, pipe, true);
/* switch to lower resolution */
igt_output_override_mode(output, &mode_lowres);
@@ -275,7 +273,7 @@ test_plane_position_with_output(data_t *data, enum pipe pipe,
display_commit_mode(data, pipe, flags, crc_lowres);
- igt_assert_plane_visible(pipe, false);
+ igt_assert_plane_visible(data->drm_fd, pipe, false);
/* switch back to higher resolution */
igt_output_override_mode(output, NULL);
@@ -287,7 +285,7 @@ test_plane_position_with_output(data_t *data, enum pipe pipe,
display_commit_mode(data, pipe, flags, crc_hires2);
- igt_assert_plane_visible(pipe, true);
+ igt_assert_plane_visible(data->drm_fd, pipe, true);
igt_pipe_crc_stop(data->pipe_crc);
@@ -348,7 +346,7 @@ igt_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -72,7 +72,7 @@ struct {
*/
static void test_init(data_t *data, enum pipe pipe, int n_planes)
{
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
data->plane = calloc(n_planes, sizeof(data->plane));
igt_assert_f(data->plane != NULL, "Failed to allocate memory for planes\n");
@@ -508,7 +508,7 @@ int main(int argc, char *argv[])
igt_fixture {
data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
igt_require(data.display.n_pipes > 0);
}
@@ -64,7 +64,7 @@ static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,
/* create the pipe_crc object for this pipe */
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
/* before allocating, free if any older fb */
if (data->fb_id1) {
@@ -318,7 +318,7 @@ igt_simple_main
data.drm_fd = drm_open_driver(DRIVER_INTEL);
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
data.devid = intel_get_drm_devid(data.drm_fd);
@@ -195,7 +195,7 @@ static bool psr_possible(data_t *data)
{
char buf[512];
- igt_debugfs_read("i915_edp_psr_status", buf);
+ igt_debugfs_read(data->drm_fd, "i915_edp_psr_status", buf);
return running_with_psr_disabled ||
strstr(buf, "Sink_Support: yes\n");
@@ -205,7 +205,7 @@ static bool psr_active(data_t *data)
{
char buf[512];
- igt_debugfs_read("i915_edp_psr_status", buf);
+ igt_debugfs_read(data->drm_fd, "i915_edp_psr_status", buf);
return running_with_psr_disabled ||
strstr(buf, "HW Enabled & Active bit: yes\n");
@@ -229,7 +229,7 @@ static void get_sink_crc(data_t *data, char *crc) {
if (igt_interactive_debug)
return;
- file = igt_debugfs_fopen("i915_sink_crc_eDP1", "r");
+ file = igt_debugfs_fopen(data->drm_fd, "i915_sink_crc_eDP1", "r");
igt_require(file);
ret = fscanf(file, "%s\n", crc);
@@ -124,7 +124,7 @@ static void prepare_crtc(data_t *data)
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(data->pipe,
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* get reference crc for the white fb */
@@ -183,7 +183,7 @@ igt_simple_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -139,7 +139,7 @@ static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,
/* create the pipe_crc object for this pipe */
igt_pipe_crc_free(data->pipe_crc);
- data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ data->pipe_crc = igt_pipe_crc_new(data->gfx_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
mode = igt_output_get_mode(output);
@@ -517,7 +517,7 @@ igt_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.gfx_fd);
igt_display_init(&data.display, data.gfx_fd);
}
@@ -46,11 +46,11 @@ typedef struct {
igt_plane_t *primary;
} data_t;
-static void get_crc(char *crc) {
+static void get_crc(data_t *data, char *crc) {
int ret;
FILE *file;
- file = igt_debugfs_fopen("i915_sink_crc_eDP1", "r");
+ file = igt_debugfs_fopen(data->drm_fd, "i915_sink_crc_eDP1", "r");
igt_require(file);
ret = fscanf(file, "%s\n", crc);
@@ -95,7 +95,7 @@ static void basic_sink_crc_check(data_t *data)
igt_display_commit(&data->display);
/* It should be Green */
- get_crc(crc);
+ get_crc(data, crc);
assert_color(crc, GREEN);
/* Go Red */
@@ -103,7 +103,7 @@ static void basic_sink_crc_check(data_t *data)
igt_display_commit(&data->display);
/* It should be Red */
- get_crc(crc);
+ get_crc(data, crc);
assert_color(crc, RED);
}
@@ -67,7 +67,7 @@ functional_test_init(functional_test_t *test, igt_output_t *output, enum pipe pi
data_t *data = test->data;
drmModeModeInfo *mode;
- test->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ test->pipe_crc = igt_pipe_crc_new(data->drm_fd, pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
igt_output_set_pipe(output, pipe);
@@ -545,13 +545,13 @@ cursor_leak_test_fini(data_t *data,
}
static int
-i915_gem_fb_count(void)
+i915_gem_fb_count(data_t *data)
{
char buf[1024];
FILE *fp;
int count = 0;
- fp = igt_debugfs_fopen("i915_gem_framebuffer", "r");
+ fp = igt_debugfs_fopen(data->drm_fd, "i915_gem_framebuffer", "r");
igt_require(fp);
while (fgets(buf, sizeof(buf), fp) != NULL)
count++;
@@ -579,7 +579,7 @@ cursor_leak_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
mode = igt_output_get_mode(output);
/* Count GEM framebuffers before creating our cursor FB's */
- count1 = i915_gem_fb_count();
+ count1 = i915_gem_fb_count(data);
/* Black background FB */
igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
@@ -637,7 +637,7 @@ cursor_leak_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
cursor_leak_test_fini(data, output, &background_fb, cursor_fb);
/* We should be back to the same framebuffer count as when we started */
- count2 = i915_gem_fb_count();
+ count2 = i915_gem_fb_count(data);
igt_assert_eq(count1, count2);
}
@@ -791,7 +791,7 @@ igt_main
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(data.drm_fd);
igt_display_init(&data.display, data.drm_fd);
}
@@ -297,7 +297,7 @@ sysfs_write(const char *file, uint64_t val)
}
static char *
-read_debugfs_record(const char *file, const char *key)
+read_debugfs_record(int fd, const char *file, const char *key)
{
FILE *fp;
char *line = NULL;
@@ -306,7 +306,7 @@ read_debugfs_record(const char *file, const char *key)
int key_len = strlen(key);
char *value = NULL;
- fp = igt_debugfs_fopen(file, "r");
+ fp = igt_debugfs_fopen(fd, file, "r");
igt_require(fp);
while ((len = getline(&line, &line_buf_size, fp)) > 0) {
@@ -332,9 +332,9 @@ done:
}
static uint64_t
-read_debugfs_u64_record(const char *file, const char *key)
+read_debugfs_u64_record(int fd, const char *file, const char *key)
{
- char *str_val = read_debugfs_record(file, key);
+ char *str_val = read_debugfs_record(fd, file, key);
uint64_t val;
igt_require(str_val);
@@ -2137,25 +2137,25 @@ test_rc6_disable(void)
.properties_ptr = to_user_pointer(properties),
};
int stream_fd = __perf_open(drm_fd, ¶m);
- uint64_t n_events_start = read_debugfs_u64_record("i915_drpc_info",
+ uint64_t n_events_start = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
"RC6 residency since boot");
uint64_t n_events_end;
nanosleep(&(struct timespec){ .tv_sec = 0, .tv_nsec = 500000000 }, NULL);
- n_events_end = read_debugfs_u64_record("i915_drpc_info",
+ n_events_end = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
"RC6 residency since boot");
igt_assert_eq(n_events_end - n_events_start, 0);
close(stream_fd);
- n_events_start = read_debugfs_u64_record("i915_drpc_info",
+ n_events_start = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
"RC6 residency since boot");
nanosleep(&(struct timespec){ .tv_sec = 0, .tv_nsec = 500000000 }, NULL);
- n_events_end = read_debugfs_u64_record("i915_drpc_info",
+ n_events_end = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
"RC6 residency since boot");
igt_assert_neq(n_events_end - n_events_start, 0);
@@ -209,7 +209,7 @@ igt_main
igt_require(supports_lpsp(devid));
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
kmstest_set_vt_graphics_mode();
}
@@ -657,9 +657,9 @@ static void setup_pc8(void)
if (!supports_pc8_plus_residencies())
return;
- pc8_status_fd = igt_debugfs_open("i915_pc8_status", O_RDONLY);
+ pc8_status_fd = igt_debugfs_open(drm_fd, "i915_pc8_status", O_RDONLY);
if (pc8_status_fd == -1)
- pc8_status_fd = igt_debugfs_open("i915_runtime_pm_status",
+ pc8_status_fd = igt_debugfs_open(drm_fd, "i915_runtime_pm_status",
O_RDONLY);
igt_assert_f(pc8_status_fd >= 0,
"Can't open /sys/kernel/debug/dri/0/i915_runtime_pm_status");
@@ -919,7 +919,7 @@ static void debugfs_forcewake_user_subtest(void)
disable_all_screens_and_wait(&ms_data);
- fd = igt_open_forcewake_handle();
+ fd = igt_open_forcewake_handle(drm_fd);
igt_require(fd >= 0);
if (has_runtime_pm) {
@@ -35,6 +35,19 @@
IGT_TEST_DESCRIPTION("Tests slice/subslice/EU power gating functionality.\n");
+struct {
+ int init;
+ int drm_fd;
+ int devid;
+ int gen;
+ int has_ppgtt;
+ drm_intel_bufmgr *bufmgr;
+ struct intel_batchbuffer *batch;
+ igt_media_spinfunc_t spinfunc;
+ struct igt_buf buf;
+ uint32_t spins_per_msec;
+} gem;
+
static double
to_dt(const struct timespec *start, const struct timespec *end)
{
@@ -174,7 +187,7 @@ dbg_get_status(struct status *stat)
static void
dbg_init(void)
{
- dbg.status_fd = igt_debugfs_open("i915_sseu_status", O_RDONLY);
+ dbg.status_fd = igt_debugfs_open(gem.drm_fd, "i915_sseu_status", O_RDONLY);
igt_skip_on_f(dbg.status_fd == -1,
"debugfs entry 'i915_sseu_status' not found\n");
dbg.init = 1;
@@ -190,19 +203,6 @@ dbg_deinit(void)
}
}
-struct {
- int init;
- int drm_fd;
- int devid;
- int gen;
- int has_ppgtt;
- drm_intel_bufmgr *bufmgr;
- struct intel_batchbuffer *batch;
- igt_media_spinfunc_t spinfunc;
- struct igt_buf buf;
- uint32_t spins_per_msec;
-} gem;
-
static void
gem_check_spin(uint32_t spins)
{
@@ -246,7 +246,7 @@ igt_main
igt_skip_on((check_for_dma_buf_mmap(gpu.drm_fd) != 0));
kmstest_set_vt_graphics_mode();
- igt_require_pipe_crc();
+ igt_require_pipe_crc(gpu.drm_fd);
igt_display_init(&gpu.display, gpu.drm_fd);
}
@@ -67,7 +67,7 @@ static void print_crcs(display_crc_t *ctx)
char *crc_str;
int i;
- pipe_crc = igt_pipe_crc_new(ctx->pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+ pipe_crc = igt_pipe_crc_new(ctx->fd, ctx->pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
for (i = 0; i < ctx->n_crcs; i++) {
igt_pipe_crc_collect_crc(pipe_crc, &crc);
@@ -965,6 +965,7 @@ int main(int argc, char *argv[])
int pipe = 0, bit = 0, target_scanline = 0, target_fuzz = 1;
bool test_pixelcount = false;
uint32_t devid;
+ int drm_fd;
uint32_t min[2*128] = {};
uint32_t max[2*128] = {};
uint32_t a, b;
@@ -1186,7 +1187,10 @@ int main(int argc, char *argv[])
break;
}
- intel_register_access_init(intel_get_pci_device(), 0);
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
@@ -1263,6 +1267,8 @@ int main(int argc, char *argv[])
intel_register_access_fini();
+ close(drm_fd);
+
if (quit)
return 0;
@@ -229,13 +229,13 @@ static void clear_test_active(void)
static void setup_debugfs_files(void)
{
- test_type_fp = igt_debugfs_fopen(INTEL_DP_TEST_TYPE_FILE, "r");
+ test_type_fp = igt_debugfs_fopen(drm_fd, INTEL_DP_TEST_TYPE_FILE, "r");
igt_require(test_type_fp);
- test_data_fp = igt_debugfs_fopen(INTEL_DP_TEST_DATA_FILE, "r");
+ test_data_fp = igt_debugfs_fopen(drm_fd, INTEL_DP_TEST_DATA_FILE, "r");
igt_require(test_data_fp);
- test_active_fp = igt_debugfs_fopen(INTEL_DP_TEST_ACTIVE_FILE, "w+");
+ test_active_fp = igt_debugfs_fopen(drm_fd, INTEL_DP_TEST_ACTIVE_FILE, "w+");
igt_require(test_active_fp);
/* Reset the active flag for safety */
@@ -36,6 +36,7 @@
#include <unistd.h>
#include "intel_io.h"
#include "intel_chipset.h"
+#include "drmtest.h"
bool daemonized;
@@ -63,6 +64,7 @@ is_alive(void) {
int main(int argc, char *argv[])
{
+ int drm_fd;
int ret;
if (argc > 2 || (argc == 2 && !strncmp(argv[1], "-h", 2))) {
@@ -79,7 +81,10 @@ int main(int argc, char *argv[])
INFO_PRINT("started daemon");
}
- ret = intel_register_access_init(intel_get_pci_device(), 1);
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
+ ret = intel_register_access_init(intel_get_pci_device(), 1, drm_fd);
if (ret) {
INFO_PRINT("Couldn't init register access\n");
exit(1);
@@ -90,13 +95,14 @@ int main(int argc, char *argv[])
if (!is_alive()) {
INFO_PRINT("gpu reset? restarting daemon\n");
intel_register_access_fini();
- ret = intel_register_access_init(intel_get_pci_device(), 1);
+ ret = intel_register_access_init(intel_get_pci_device(), 1, drm_fd);
if (ret)
INFO_PRINT("Reg access init fail\n");
}
sleep(1);
}
intel_register_access_fini();
+ close(drm_fd);
INFO_PRINT("Forcewake unlock\n");
if (daemonized) {
@@ -46,6 +46,7 @@
#include "instdone.h"
#include "intel_reg.h"
#include "intel_chipset.h"
+#include "drmtest.h"
#define FORCEWAKE 0xA18C
#define FORCEWAKE_ACK 0x130090
@@ -410,6 +411,7 @@ usage(const char *appname)
int main(int argc, char **argv)
{
uint32_t devid;
+ int drm_fd;
struct pci_device *pci_dev;
struct ring render_ring = {
.name = "render",
@@ -510,8 +512,11 @@ int main(int argc, char **argv)
top_bits_sorted[i] = &top_bits[i];
}
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
/* Grab access to the registers */
- intel_register_access_init(pci_dev, 0);
+ intel_register_access_init(pci_dev, 0, drm_fd);
ring_init(&render_ring);
if (IS_GEN4(devid) || IS_GEN5(devid))
@@ -714,5 +719,6 @@ int main(int argc, char **argv)
fclose(output);
intel_register_access_fini();
+ close(drm_fd);
return 0;
}
@@ -47,7 +47,7 @@ int verbosity_level = 3; /* by default capture logs at max verbosity */
uint32_t produced, consumed;
uint64_t total_bytes_written;
int num_buffers = NUM_SUBBUFS;
-int relay_fd, outfile_fd = -1;
+int relay_fd, drm_fd, outfile_fd = -1;
uint32_t test_duration, max_filesize;
pthread_cond_t underflow_cond, overflow_cond;
bool stop_logging, discard_oldlogs, capturing_stopped;
@@ -59,7 +59,7 @@ static void guc_log_control(bool enable_logging)
uint64_t val;
int ret;
- control_fd = igt_debugfs_open(CONTROL_FILE_NAME, O_WRONLY);
+ control_fd = igt_debugfs_open(drm_fd, CONTROL_FILE_NAME, O_WRONLY);
igt_assert_f(control_fd >= 0, "couldn't open the guc log control file\n");
val = enable_logging ? ((verbosity_level << 4) | 0x1) : 0;
@@ -228,7 +228,7 @@ static void init_flusher_thread(void)
static void open_relay_file(void)
{
- relay_fd = igt_debugfs_open(RELAY_FILE_NAME, O_RDONLY);
+ relay_fd = igt_debugfs_open(drm_fd, RELAY_FILE_NAME, O_RDONLY);
igt_assert_f(relay_fd >= 0, "couldn't open the guc log file\n");
/* Purge the old/boot-time logs from the relay buffer.
@@ -374,6 +374,9 @@ int main(int argc, char **argv)
process_command_line(argc, argv);
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
init_main_thread();
/* Use a separate thread for flushing the logs to a file on disk.
@@ -434,5 +437,6 @@ int main(int argc, char **argv)
free(read_buffer);
close(relay_fd);
close(outfile_fd);
+ close(drm_fd);
igt_exit();
}
@@ -1081,6 +1081,7 @@ printf("Options:\n"
int main(int argc, char *argv[])
{
int opt;
+ int drm_fd;
int ret = 0;
Transcoder transcoder = TRANSC_INVALID;
DipType dip = DIP_INVALID;
@@ -1107,8 +1108,11 @@ int main(int argc, char *argv[])
printf("WARNING: This is just a debugging tool! Don't expect it to work"
" perfectly: the Kernel might undo our changes.\n");
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
pci_dev = intel_get_pci_device();
- intel_register_access_init(pci_dev, 0);
+ intel_register_access_init(pci_dev, 0, drm_fd);
intel_check_pch();
if (IS_GEN4(pci_dev->device_id))
@@ -1257,5 +1261,6 @@ int main(int argc, char *argv[])
out:
intel_register_access_fini();
+ close(drm_fd);
return ret;
}
@@ -194,7 +194,7 @@ int main(int argc, char *argv[])
if (intel_gen(devid) < 7 || IS_VALLEYVIEW(devid))
exit(77);
- assert(intel_register_access_init(intel_get_pci_device(), 0) == 0);
+ assert(intel_register_access_init(intel_get_pci_device(), 0, device) == 0);
dir = igt_sysfs_open(device, NULL);
@@ -33,6 +33,7 @@
#include "intel_io.h"
#include "intel_chipset.h"
#include "intel_reg.h"
+#include "drmtest.h"
int gen;
@@ -265,7 +266,7 @@ static void print_usage(void)
int main (int argc, char *argv[])
{
- int opt;
+ int opt, drm_fd;
int ret = 0;
char intel_pipe = '\0';
int x = 0, y = 0;
@@ -278,8 +279,11 @@ int main (int argc, char *argv[])
"with overscan compensation properties: it is just a temporary "
"solution that may or may not work. Use it at your own risk.\n");
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
pci_dev = intel_get_pci_device();
- intel_register_access_init(pci_dev, 0);
+ intel_register_access_init(pci_dev, 0, drm_fd);
devid = pci_dev->device_id;
if (!HAS_PCH_SPLIT(devid)) {
@@ -342,5 +346,6 @@ int main (int argc, char *argv[])
out:
intel_register_access_fini();
+ close(drm_fd);
return ret;
}
@@ -483,7 +483,7 @@ main(int argc, char **argv)
if (oacontrol) {
/* Forcewake */
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, fd);
/* Enable performance counters */
intel_register_write(OACONTROL,
@@ -32,6 +32,7 @@
#include <sys/types.h>
#include <unistd.h>
+#include "igt.h"
#include "intel_io.h"
#include "intel_chipset.h"
@@ -57,6 +58,7 @@ struct config {
struct pci_device *pci_dev;
char *mmiofile;
uint32_t devid;
+ int drm_fd;
/* read: number of registers to read */
uint32_t count;
@@ -409,7 +411,7 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
if (config->mmiofile)
intel_mmio_use_dump_file(config->mmiofile);
else
- intel_register_access_init(config->pci_dev, 0);
+ intel_register_access_init(config->pci_dev, 0, config->drm_fd);
for (i = 1; i < argc; i++) {
struct reg reg;
@@ -439,7 +441,7 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
return EXIT_FAILURE;
}
- intel_register_access_init(config->pci_dev, 0);
+ intel_register_access_init(config->pci_dev, 0, config->drm_fd);
for (i = 1; i < argc; i += 2) {
struct reg reg;
@@ -477,7 +479,7 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
if (config->mmiofile)
intel_mmio_use_dump_file(config->mmiofile);
else
- intel_register_access_init(config->pci_dev, 0);
+ intel_register_access_init(config->pci_dev, 0, config->drm_fd);
for (i = 0; i < config->regcount; i++) {
reg = &config->regs[i];
@@ -877,6 +879,9 @@ int main(int argc, char *argv[])
config.devid = config.pci_dev->device_id;
}
+ /* Just to make sure we open the right debugfs files */
+ config.drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
if (read_reg_spec(&config) < 0) {
return EXIT_FAILURE;
}
@@ -895,6 +900,7 @@ int main(int argc, char *argv[])
ret = command->function(&config, argc, argv);
+ close(config.drm_fd);
free(config.mmiofile);
return ret;
@@ -30,11 +30,11 @@
#include <string.h>
#include "intel_io.h"
#include "intel_chipset.h"
+#include "drmtest.h"
static uint32_t display_base;
static uint32_t devid;
-
-#define ARRAY_SIZE(a) (sizeof(a)/sizeof((a)[0]))
+static int drm_fd;
static uint32_t read_reg(uint32_t addr)
{
@@ -143,7 +143,7 @@ static void ilk_wm_dump(void)
int num_pipes = is_gen7_plus(devid) ? 3 : 2;
struct ilk_wm wm = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
for (i = 0; i < num_pipes; i++) {
dspcntr[i] = read_reg(0x70180 + i * 0x1000);
@@ -291,7 +291,7 @@ static void vlv_wm_dump(void)
uint32_t dsp_ss_pm, ddr_setup2;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
dsparb2 = read_reg(0x70060);
@@ -507,7 +507,7 @@ static void g4x_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dspacntr = read_reg(0x70180);
dspbcntr = read_reg(0x71180);
@@ -593,7 +593,7 @@ static void gen4_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -664,7 +664,7 @@ static void pnv_wm_dump(void)
uint32_t cbr;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -754,7 +754,7 @@ static void gen3_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
instpm = read_reg(0x20c0);
@@ -823,7 +823,7 @@ static void gen2_wm_dump(void)
uint32_t mi_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
mem_mode = read_reg(0x20cc);
@@ -900,6 +900,9 @@ int main(int argc, char *argv[])
{
devid = intel_get_pci_device()->device_id;
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) {
display_base = 0x180000;
vlv_wm_dump();
@@ -920,5 +923,7 @@ int main(int argc, char *argv[])
return 1;
}
+ close(drm_fd);
+
return 0;
}
When opening a DRM debugfs file, locate the right path based on the given DRM device FD. This is needed so, in setups with more than one DRM device, any operations on debugfs files affect the expected DRM device. v2: - rebased and fixed new API additions v3: - updated chamelium test, which was missed previously - use the minor of the device for the debugfs path, not the major - have a proper exit handler for calling igt_hpd_storm_reset with the right device fd. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Robert Foss <robert.foss@collabora.com> --- benchmarks/gem_latency.c | 2 +- lib/drmtest.c | 2 +- lib/igt_aux.c | 10 +- lib/igt_aux.h | 4 +- lib/igt_debugfs.c | 197 +++++++++++++++++++++++--------------- lib/igt_debugfs.h | 30 +++--- lib/igt_gt.c | 14 +-- lib/igt_gt.h | 4 +- lib/igt_kms.c | 10 +- lib/igt_kms.h | 4 +- lib/intel_io.h | 2 +- lib/intel_mmio.c | 4 +- lib/intel_os.c | 9 +- tests/chamelium.c | 20 ++-- tests/drv_hangman.c | 4 +- tests/drv_missed_irq.c | 35 +++---- tests/drv_suspend.c | 8 +- tests/gem_concurrent_all.c | 2 +- tests/gem_eio.c | 2 +- tests/gem_exec_latency.c | 2 +- tests/gem_exec_parse.c | 2 +- tests/gem_exec_whisper.c | 6 +- tests/gem_mocs_settings.c | 14 ++- tests/gem_persistent_relocs.c | 2 +- tests/gem_ppgtt.c | 10 +- tests/gem_reloc_vs_gpu.c | 2 +- tests/gem_render_linear_blits.c | 2 +- tests/gem_render_tiled_blits.c | 2 +- tests/gem_seqno_wrap.c | 24 ++--- tests/gem_tiled_swapping.c | 9 +- tests/gem_workarounds.c | 4 +- tests/kms_atomic_transition.c | 2 +- tests/kms_ccs.c | 4 +- tests/kms_chv_cursor_fail.c | 4 +- tests/kms_crtc_background_color.c | 4 +- tests/kms_cursor_crc.c | 4 +- tests/kms_cursor_legacy.c | 4 +- tests/kms_draw_crc.c | 2 +- tests/kms_fbc_crc.c | 8 +- tests/kms_fbcon_fbt.c | 44 ++++----- tests/kms_flip_tiling.c | 8 +- tests/kms_frontbuffer_tracking.c | 26 ++--- tests/kms_invalid_dotclock.c | 6 +- tests/kms_mmap_write_crc.c | 4 +- tests/kms_mmio_vs_cs_flip.c | 6 +- tests/kms_pipe_color.c | 5 +- tests/kms_pipe_crc_basic.c | 12 +-- tests/kms_plane.c | 4 +- tests/kms_plane_lowres.c | 14 ++- tests/kms_plane_multiple.c | 4 +- tests/kms_plane_scaling.c | 4 +- tests/kms_psr_sink_crc.c | 6 +- tests/kms_pwrite_crc.c | 4 +- tests/kms_rotation_crc.c | 4 +- tests/kms_sink_crc_basic.c | 8 +- tests/kms_universal_plane.c | 12 +-- tests/perf.c | 16 ++-- tests/pm_lpsp.c | 2 +- tests/pm_rpm.c | 6 +- tests/pm_sseu.c | 28 +++--- tests/prime_mmap_kms.c | 2 +- tools/intel_display_crc.c | 2 +- tools/intel_display_poller.c | 8 +- tools/intel_dp_compliance.c | 6 +- tools/intel_forcewaked.c | 10 +- tools/intel_gpu_top.c | 8 +- tools/intel_guc_logger.c | 10 +- tools/intel_infoframes.c | 7 +- tools/intel_l3_parity.c | 2 +- tools/intel_panel_fitter.c | 9 +- tools/intel_perf_counters.c | 2 +- tools/intel_reg.c | 12 ++- tools/intel_watermark.c | 23 +++-- 73 files changed, 446 insertions(+), 352 deletions(-)