From patchwork Mon Mar 27 18:55:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 9647387 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 664A5602C8 for ; Mon, 27 Mar 2017 18:56:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 596CF283A6 for ; Mon, 27 Mar 2017 18:56:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4B76F28418; Mon, 27 Mar 2017 18:56:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D35DB283A6 for ; Mon, 27 Mar 2017 18:56:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6261F89AA2; Mon, 27 Mar 2017 18:56:18 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id EC63D89AA2 for ; Mon, 27 Mar 2017 18:56:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490640975; x=1522176975; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=bteXw5XNkhSuL3X2Rax8ngV1qDidtMh8jWXNWqQuL2w=; b=HBylHoD9hAIbnss4K34IAHGgZ15ePbXp9bRfoNMP4Ei0aLMaW+3MwtHJ e1A9ZJnRWV//UokdlxslmOlKBIQ6qQ==; Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Mar 2017 11:56:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,233,1486454400"; d="scan'208";a="65638398" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga002.jf.intel.com with SMTP; 27 Mar 2017 11:56:13 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Mar 2017 21:56:12 +0300 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Mon, 27 Mar 2017 21:55:40 +0300 Message-Id: <20170327185546.2977-10-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170327185546.2977-1-ville.syrjala@linux.intel.com> References: <20170327185546.2977-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/15] drm/i915: Generalize cursor size checks a bit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä We have the maximum cursor dimensions stored in the mode_config, so let's just consult that information instead of hardcoding the same information in multiple places. We still need to keep some per-platform checks as the limitations are quite diverse. Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/intel_display.c | 34 +++++++++++++--------------------- 1 file changed, 13 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 774f9668076f..4f7a3e3f03e7 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9169,6 +9169,17 @@ static u32 intel_cursor_position(const struct intel_plane_state *plane_state) return pos; } +static bool intel_cursor_size_ok(const struct intel_plane_state *plane_state) +{ + const struct drm_mode_config *config = + &plane_state->base.plane->dev->mode_config; + int width = plane_state->base.crtc_w; + int height = plane_state->base.crtc_h; + + return width > 0 && width <= config->cursor_width && + height > 0 && height <= config->cursor_height; +} + static int intel_check_cursor(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state) { @@ -9221,28 +9232,13 @@ static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state, static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state) { - struct drm_i915_private *dev_priv = - to_i915(plane_state->base.plane->dev); int width = plane_state->base.crtc_w; - int height = plane_state->base.crtc_h; - - if (width == 0 || height == 0) - return false; /* * 845g/865g are only limited by the width of their cursors, * the height is arbitrary up to the precision of the register. */ - if (!IS_ALIGNED(width, 64)) - return false; - - if (width > (IS_I845G(dev_priv) ? 64 : 512)) - return false; - - if (height > 1023) - return false; - - return true; + return intel_cursor_size_ok(plane_state) && IS_ALIGNED(width, 64); } static int i845_check_cursor(struct intel_plane *plane, @@ -9378,12 +9374,10 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state, static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state) { - struct drm_i915_private *dev_priv = - to_i915(plane_state->base.plane->dev); int width = plane_state->base.crtc_w; int height = plane_state->base.crtc_h; - if (width == 0 || height == 0) + if (!intel_cursor_size_ok(plane_state)) return false; /* @@ -9393,8 +9387,6 @@ static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state) switch (width | height) { case 256: case 128: - if (IS_GEN2(dev_priv)) - return false; case 64: break; default: