From patchwork Tue Apr 18 16:56:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 9685881 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 202DD60375 for ; Tue, 18 Apr 2017 16:56:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 10D0D1FF21 for ; Tue, 18 Apr 2017 16:56:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 047222022C; Tue, 18 Apr 2017 16:56:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 962C51FF21 for ; Tue, 18 Apr 2017 16:56:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C978D89C5E; Tue, 18 Apr 2017 16:56:28 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8885A8994A for ; Tue, 18 Apr 2017 16:56:27 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id d79so505587wmi.2 for ; Tue, 18 Apr 2017 09:56:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Dfb7vHnNzRKMlRdgH7puxNRA5RI+bZahPmxNfceVmro=; b=pkVK30ENGZvoq/RS03hAipT6KSwyXUfOb2YvjJhK5os1Zf7hrHjm6I0wAWIBdzz3nv DA6MY6vPuN8+xR2BLYi6VLRbt/t8CMk8eU5nBF/3iVnx25ffeHv8JBX8BbUhXCOa+mzW pzsUXAjB6tgbY/soM10YhkjSg95z3+280ZIO5UFh3/Joq8KWdyXpgB7zZIidRGSBZEjA YpfG1ThcGnQ//PxzPoj/RdT7LqrFOYjPyolRuF2/lkpa9k16hT4elo+8XgFBYXylScyd fauTqWjKR0UK3cTS6taolJ9wTGcnl/8aJ67ipDTP4TVCNZUVMJ3LAQqAvRcuaCY9KxfK C1SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Dfb7vHnNzRKMlRdgH7puxNRA5RI+bZahPmxNfceVmro=; b=TwWRpySrknrq352MCOjhZLP29hsQJIsdoGHudkPmZ1QzcTtXmr/+mlbtoVbxw4ffhz t/OvKwhrW/UlgXVHMaj73gJhnGAE1nafrFnZVFXTlAywwsWis73y6gHVm9D3mLsAioQG HCxcEa9HzI8Qb93eWXNTblDqd2g/DORSFHr+qqC+ePqNIOyVqIX2QNnR0otP2/27btpm N2DvbbWr+gCXUS6aF8YQ+ap9UJ7qi+aed5OZ8i7baA62U1OMaQbM1lI9OB/mqgzlrEnM zJ2B4jnqZLYR9hhuSL6wMKQHOUK9EHiO84llQuRJPJhOKboWpWtpOyQEK7iZ0/UvW0tT zHgQ== X-Gm-Message-State: AN3rC/6FGVzP4V7aVuBFF5M+j7VeFAET1A9rOmul0vE03mbkrOuSL/3L q0KZYOsptxACKA== X-Received: by 10.28.185.10 with SMTP id j10mr6991121wmf.57.1492534586171; Tue, 18 Apr 2017 09:56:26 -0700 (PDT) Received: from t460p.intel ([94.15.199.60]) by smtp.gmail.com with ESMTPSA id 23sm19597400wrx.26.2017.04.18.09.56.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Apr 2017 09:56:25 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Tue, 18 Apr 2017 17:56:15 +0100 Message-Id: <20170418165615.27666-3-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170418165615.27666-1-tvrtko.ursulin@linux.intel.com> References: <20170418165615.27666-1-tvrtko.ursulin@linux.intel.com> Cc: Ben Widawsky , intel-vaapi-media@lists.01.org, mesa-dev@lists.freedesktop.org, Daniel Vetter Subject: [Intel-gfx] [RFC 2/2] drm/i915: Select engines via class and instance in execbuffer2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Building on top of the previous patch which exported the concept of engine classes and instances, we can also use this instead of the current awkward engine selection uAPI. This is primarily interesting for the VCS engine selection which is a) currently done via disjoint set of flags, and b) the current I915_EXEC_BSD flags has different semantics depending on the underlying hardware which is bad. Proposed idea here is to reserve 16-bits of flags, to pass in the engine class and instance (8 bits each), and a new flag named I915_EXEC_CLASS_INSTACE to tell the kernel this new engine selection API is in use. The new uAPI also removes access to the weak VCS engine balancing as currently existing in the driver. Example usage to send a command to VCS0: eb.flags = i915_execbuffer2_engine(DRM_I915_ENGINE_CLASS_VIDEO_DECODE, 0); Or to send a command to VCS1: eb.flags = i915_execbuffer2_engine(DRM_I915_ENGINE_CLASS_VIDEO_DECODE, 1); Signed-off-by: Tvrtko Ursulin Cc: Ben Widawsky Cc: Chris Wilson Cc: Daniel Vetter Cc: Joonas Lahtinen Cc: Jon Bloomfield Cc: Daniel Charles Cc: "Rogozhkin, Dmitry V" Cc: Oscar Mateo Cc: "Gong, Zhipeng" Cc: intel-vaapi-media@lists.01.org Cc: mesa-dev@lists.freedesktop.org --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 36 ++++++++++++++++++++++++++++++ include/uapi/drm/i915_drm.h | 7 +++++- 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index af1965774e7b..7fc92ec839a1 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1153,6 +1153,10 @@ i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS) return false; + if ((exec->flags & I915_EXEC_CLASS_INSTANCE) && + (exec->flags & I915_EXEC_RING_MASK)) + return false; + /* Kernel clipping was a DRI1 misfeature */ if (exec->num_cliprects || exec->cliprects_ptr) return false; @@ -1492,6 +1496,35 @@ gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, return file_priv->bsd_engine; } +extern u8 user_class_map[DRM_I915_ENGINE_CLASS_MAX]; + +static struct intel_engine_cs * +eb_select_engine_class_instance(struct drm_i915_private *i915, + struct drm_i915_gem_execbuffer2 *args) +{ + struct intel_engine_cs *engine; + enum intel_engine_id id; + u16 class_instance; + u8 user_class, class, instance; + + class_instance = (args->flags & I915_EXEC_CLASS_INSTANCE_MASK) >> + I915_EXEC_CLASS_INSTANCE_SHIFT; + + user_class = class_instance >> 8; + instance = class_instance & 0xff; + + if (user_class >= DRM_I915_ENGINE_CLASS_MAX) + return NULL; + class = user_class_map[user_class]; + + for_each_engine(engine, i915, id) { + if (engine->class == class && engine->instance == instance) + return engine; + } + + return NULL; +} + #define I915_USER_RINGS (4) static const enum intel_engine_id user_ring_map[I915_USER_RINGS + 1] = { @@ -1510,6 +1543,9 @@ eb_select_engine(struct drm_i915_private *dev_priv, unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; struct intel_engine_cs *engine; + if (args->flags & I915_EXEC_CLASS_INSTANCE) + return eb_select_engine_class_instance(dev_priv, args); + if (user_ring_id > I915_USER_RINGS) { DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id); return NULL; diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 6058596a9f33..727a6dc4b029 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -906,7 +906,12 @@ struct drm_i915_gem_execbuffer2 { */ #define I915_EXEC_FENCE_OUT (1<<17) -#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_OUT<<1)) +#define I915_EXEC_CLASS_INSTANCE (1<<18) + +#define I915_EXEC_CLASS_INSTANCE_SHIFT (19) +#define I915_EXEC_CLASS_INSTANCE_MASK (0xffff << I915_EXEC_CLASS_INSTANCE_SHIFT) + +#define __I915_EXEC_UNKNOWN_FLAGS (-(35 << 1)) #define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) #define i915_execbuffer2_set_context_id(eb2, context) \