From patchwork Thu May 4 00:28:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Puthikorn Voravootivat X-Patchwork-Id: 9710653 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E465E60385 for ; Thu, 4 May 2017 00:28:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D684228648 for ; Thu, 4 May 2017 00:28:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CB67F2867A; Thu, 4 May 2017 00:28:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 782A628648 for ; Thu, 4 May 2017 00:28:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5CAA56E3D5; Thu, 4 May 2017 00:28:53 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pf0-x232.google.com (mail-pf0-x232.google.com [IPv6:2607:f8b0:400e:c00::232]) by gabe.freedesktop.org (Postfix) with ESMTPS id D404F6E3C2 for ; Thu, 4 May 2017 00:28:51 +0000 (UTC) Received: by mail-pf0-x232.google.com with SMTP id q20so2506709pfg.0 for ; Wed, 03 May 2017 17:28:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=BlWrbJYGZVfLYX1CC6Wjtdo10Epr9loreVix2dKKQis=; b=Uh6vbKCuLq29OmMweSLM/Gfz4OnOJV3/EjEEe6TTXBmtdXOwpfdTFCVz6sbxmXYuB9 lc8p+wrGkZeMgQAb1Qnn0+Io1NbcWY8jtuzR4brhHLjMS2JXaYcC+tSTDAV/ARQyF4uQ SL9fmCmlunctcE1PqtFP0N9UG0zFE2AToX6Q3p2NHgOQMb5U822orAdXC+qSzrmHOqUk NZqrsoGN5pAi08eFXgK/3wCXoElG51ARnF/5TD9zyHjRiSgqhAagPUF78wAUrAgt99pq R72fY/1IlOqN9Vj55ey1UfhmLkAJc6yHx8esT8W3XRNgkMqmMb8v0phqaxsRGqDihg07 MJIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=BlWrbJYGZVfLYX1CC6Wjtdo10Epr9loreVix2dKKQis=; b=RLk3lVVgFi2Ye8euyEzRHQ2AQG0nglq61dvgc1bG0b5VEC2NqE7AlJn5TB4SS++dU0 YXpDRrd7S9itkxHpF1wbV16bN4xTIUbNPrdB26PllyNbtub1bbEJy1PB0b8w6gHe049u ekMmibOOWvrFlXfxx9W5YPMh1nLIFwQw4RtcLfQ0LmLpXXmqICXOh2UBgeEolipXeiRm OiPWe98hmUmnxiRzWU4e+swC2VF64bRxxXZIyiCxLve4PLuGZ7fgxukzqBm2xIbO+/cy a7XHm77V2n2TSpNS9VusNJamYifN62Tgh/5PqoXNqH8u/mtsHe18dY3YWWg3rw6U1Frd aOnw== X-Gm-Message-State: AN3rC/4DdTqfvw4ZiBva4c4n3enbztIXtNgv+hEWNil5GYdwojG9K7Ii gkdjNvzq1xTJa+de X-Received: by 10.98.209.90 with SMTP id t26mr1993729pfl.194.1493857731199; Wed, 03 May 2017 17:28:51 -0700 (PDT) Received: from puthik2.mtv.corp.google.com ([2620:0:1000:1301:8cfe:b3:9bd6:49ad]) by smtp.gmail.com with ESMTPSA id d83sm479763pfe.40.2017.05.03.17.28.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 May 2017 17:28:49 -0700 (PDT) Received: by puthik2.mtv.corp.google.com (Postfix, from userid 218808) id 5319D11F8BA; Wed, 3 May 2017 17:28:46 -0700 (PDT) From: Puthikorn Voravootivat To: intel-gfx@lists.freedesktop.org Date: Wed, 3 May 2017 17:28:36 -0700 Message-Id: <20170504002836.120988-10-puthik@chromium.org> X-Mailer: git-send-email 2.13.0.rc1.294.g07d810a77f-goog In-Reply-To: <20170504002836.120988-1-puthik@chromium.org> References: <20170504002836.120988-1-puthik@chromium.org> Cc: dri-devel@lists.freedesktop.org, Puthikorn Voravootivat , Dhinakaran Pandiyan Subject: [Intel-gfx] [PATCH v5 9/9] drm/i915: Set PWM divider to match desired frequency in vbt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Read desired PWM frequency from panel vbt and calculate the value for divider in DPCD address 0x724 and 0x728 to match that frequency as close as possible. Signed-off-by: Puthikorn Voravootivat --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 71 +++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index fc26fea94fd4..441ad434a82b 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -113,12 +113,76 @@ intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp, } } +/* + * Set PWM Frequency divider to match desired frequency in vbt. + * The PWM Frequency is calculated as 27Mhz / (F x P). + * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the + * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) + * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the + * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) + */ +static void intel_dp_aux_set_pwm_freq(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + int freq, fxp, f; + u8 pn, pn_min, pn_max; + + /* Find desired value of (F x P) + * Note that, if F x P is out of supported range, the maximum value or + * minimum value will applied automatically. So no need to check that. + */ + freq = dev_priv->vbt.backlight.pwm_freq_hz; + DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq); + if (!freq) { + DRM_DEBUG_KMS("Use panel default backlight frequency\n"); + return; + } + + fxp = DP_EDP_BACKLIGHT_FREQ_BASE / freq; + + /* Use lowest possible value of Pn to try to make F to be between 1 and + * 255 while still in the range Pn_min and Pn_max + */ + if (drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) { + DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n"); + return; + } + if (drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) { + DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n"); + return; + } + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + + f = fxp >> pn_min; + + for (pn = pn_min; pn < pn_max && f > 255; pn++) + f >>= 1; + + f = clamp(f, 1, 255); + + if (drm_dp_dpcd_writeb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) { + DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); + return; + } + if (drm_dp_dpcd_writeb(&intel_dp->aux, + DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) { + DRM_DEBUG_KMS("Failed to write aux backlight freq\n"); + return; + } +} + static void intel_dp_aux_enable_backlight(struct intel_connector *connector) { struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); uint8_t dpcd_buf = 0; uint8_t new_dpcd_buf = 0; uint8_t edp_backlight_mode = 0; + bool freq_cap; if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) { @@ -150,6 +214,10 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) DRM_DEBUG_KMS("Enable dynamic brightness.\n"); } + freq_cap = intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP; + if (freq_cap) + new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; + if (new_dpcd_buf != dpcd_buf) { if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf) < 0) { @@ -157,6 +225,9 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) } } + if (freq_cap) + intel_dp_aux_set_pwm_freq(connector); + set_aux_backlight_enable(intel_dp, true); intel_dp_aux_set_backlight(connector, connector->panel.backlight.level); }