From patchwork Thu May 4 11:41:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maarten Lankhorst X-Patchwork-Id: 9711487 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 518C560235 for ; Thu, 4 May 2017 11:41:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3A14728686 for ; Thu, 4 May 2017 11:41:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2E1432868A; Thu, 4 May 2017 11:41:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E141F28686 for ; Thu, 4 May 2017 11:41:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4B756E4B9; Thu, 4 May 2017 11:41:51 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mblankhorst.nl (mblankhorst.nl [141.105.120.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7DD526E4B9 for ; Thu, 4 May 2017 11:41:50 +0000 (UTC) From: Maarten Lankhorst To: intel-gfx@lists.freedesktop.org Date: Thu, 4 May 2017 13:41:31 +0200 Message-Id: <20170504114133.4843-6-maarten.lankhorst@linux.intel.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170504114133.4843-1-maarten.lankhorst@linux.intel.com> References: <20170504114133.4843-1-maarten.lankhorst@linux.intel.com> Subject: [Intel-gfx] [RFC 5/7] drm/i915: Program gen4 watermarks atomically X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP We're already calculating the watermarks correctly, now we have to program them too. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c5bdef6281f3..969eb11ed5cd 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2268,20 +2268,20 @@ static int i965_compute_pipe_wm(struct intel_crtc_state *crtc_state) return 0; } -static void i965_update_wm(struct intel_crtc *crtc) +static void i965_program_watermarks(struct drm_i915_private *dev_priv) { - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_crtc *crtc; + struct i9xx_wm_state *wm_state = NULL; int srwm = 1; int cursor_sr = 16; bool cxsr_enabled = false; - crtc->wm.active.i9xx = crtc->config->wm.i9xx.optimal; - - /* Calc sr entries for one plane configs */ crtc = single_enabled_crtc(dev_priv); - if (crtc && crtc->wm.active.i9xx.cxsr) { - struct i9xx_wm_state *wm_state = &crtc->wm.active.i9xx; + if (crtc) + wm_state = &crtc->wm.active.i9xx; + /* Calc sr entries for one plane configs */ + if (wm_state && wm_state->cxsr) { srwm = wm_state->sr.plane; cursor_sr = wm_state->sr.cursor; @@ -2571,8 +2571,10 @@ static void i9xx_initial_watermarks(struct intel_atomic_state *state, pnv_program_watermarks(dev_priv); else if (INTEL_INFO(dev_priv)->num_pipes == 1) i845_program_watermarks(intel_crtc); - else + else if (INTEL_GEN(dev_priv) < 4) i9xx_program_watermarks(dev_priv); + else + i965_program_watermarks(dev_priv); mutex_unlock(&dev_priv->wm.wm_mutex); } @@ -2591,8 +2593,10 @@ static void i9xx_optimize_watermarks(struct intel_atomic_state *state, pnv_program_watermarks(dev_priv); else if (INTEL_INFO(dev_priv)->num_pipes == 1) i845_program_watermarks(intel_crtc); - else + else if (INTEL_GEN(dev_priv) < 4) i9xx_program_watermarks(dev_priv); + else + i965_program_watermarks(dev_priv); mutex_unlock(&dev_priv->wm.wm_mutex); } @@ -8911,7 +8915,8 @@ void intel_init_pm(struct drm_i915_private *dev_priv) } } else if (IS_GEN4(dev_priv)) { dev_priv->display.compute_pipe_wm = i965_compute_pipe_wm; - dev_priv->display.update_wm = i965_update_wm; + dev_priv->display.initial_watermarks = i9xx_initial_watermarks; + dev_priv->display.optimize_watermarks = i9xx_optimize_watermarks; } else if (IS_GEN3(dev_priv)) { dev_priv->display.compute_pipe_wm = i9xx_compute_pipe_wm; dev_priv->display.compute_intermediate_wm = i9xx_compute_intermediate_wm;