From patchwork Tue Jun 13 19:33:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 9784515 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A5B4260212 for ; Tue, 13 Jun 2017 19:34:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A91B2871B for ; Tue, 13 Jun 2017 19:34:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F8FD28723; Tue, 13 Jun 2017 19:34:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4D0642871B for ; Tue, 13 Jun 2017 19:34:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BFA316E39E; Tue, 13 Jun 2017 19:34:14 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 41F4A6E399 for ; Tue, 13 Jun 2017 19:34:11 +0000 (UTC) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jun 2017 12:34:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,339,1493708400"; d="scan'208";a="113970157" Received: from przanoni-mobl.amr.corp.intel.com ([10.254.177.94]) by fmsmga005.fm.intel.com with ESMTP; 13 Jun 2017 12:34:10 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 13 Jun 2017 16:33:50 -0300 Message-Id: <20170613193350.10528-8-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170613193350.10528-1-paulo.r.zanoni@intel.com> References: <20170613193350.10528-1-paulo.r.zanoni@intel.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 7/7] drm/i915: extract a _PICK2 macro X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Do it just like we do with _PICK and _PICK3, so our code looks a little more uniform. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a97af4a..3fb7b63 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -49,13 +49,14 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) } #define _PICK(__index, a, b) ((a) + (__index) * ((b) - (a))) +#define _PICK2(__index, __offsets, a) (__offsets[__index] - __offsets[0] + \ + (a) + dev_priv->info.display_mmio_offset) #define _PICK3(__index, ...) (((const u32 []){ __VA_ARGS__ })[__index]) #define _PIPE(pipe, a, b) _PICK(pipe, a, b) #define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b)) -#define _MMIO_PIPE2(pipe, reg) _MMIO(dev_priv->info.pipe_offsets[pipe] - \ - dev_priv->info.pipe_offsets[PIPE_A] + (reg) + \ - dev_priv->info.display_mmio_offset) +#define _MMIO_PIPE2(pipe, reg) _MMIO(_PICK2(pipe, dev_priv->info.pipe_offsets, \ + reg)) #define _MMIO_PIPE3(pipe, ...) _MMIO(_PICK3(pipe, __VA_ARGS__)) #define _PLANE(plane, a, b) _PICK(plane, a, b) @@ -63,9 +64,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define _TRANS(tran, a, b) _PICK(tran, a, b) #define _MMIO_TRANS(tran, a, b) _MMIO(_TRANS(tran, a, b)) -#define _MMIO_TRANS2(pipe, reg) _MMIO(dev_priv->info.trans_offsets[(pipe)] - \ - dev_priv->info.trans_offsets[TRANSCODER_A] + (reg) + \ - dev_priv->info.display_mmio_offset) +#define _MMIO_TRANS2(tran, reg) _MMIO(_PICK2(tran, \ + dev_priv->info.trans_offsets, reg)) #define _PORT(port, a, b) _PICK(port, a, b) #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))