From patchwork Wed Jun 28 18:36:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Thierry X-Patchwork-Id: 9815023 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C7A8160365 for ; Wed, 28 Jun 2017 18:36:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BF47B280CF for ; Wed, 28 Jun 2017 18:36:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B256A28417; Wed, 28 Jun 2017 18:36:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3CFD5280CF for ; Wed, 28 Jun 2017 18:36:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4274A89E19; Wed, 28 Jun 2017 18:36:57 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 55BE789E19 for ; Wed, 28 Jun 2017 18:36:55 +0000 (UTC) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2017 11:36:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,276,1496127600"; d="scan'208";a="120378474" Received: from relo-linux-11.sc.intel.com ([10.3.160.214]) by fmsmga006.fm.intel.com with ESMTP; 28 Jun 2017 11:36:54 -0700 From: Michel Thierry To: intel-gfx@lists.freedesktop.org Date: Wed, 28 Jun 2017 11:36:54 -0700 Message-Id: <20170628183654.29855-1-michel.thierry@intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170620182502.28553-2-michel.thierry@intel.com> References: <20170620182502.28553-2-michel.thierry@intel.com> Subject: [Intel-gfx] [PATCH i-g-t v2 1/2] lib: Add reset-type helper in ioctl_wrappers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Soon we will have tests that are only for platforms with reset-engine (GEN8+), so add a helper to query the has_gpu_reset via the getparam ioctl. v2: Add more helper functions to avoid using magic numbers in tests (Arek). Cc: Arkadiusz Hiler Signed-off-by: Michel Thierry --- lib/ioctl_wrappers.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++ lib/ioctl_wrappers.h | 3 +++ 2 files changed, 54 insertions(+) diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c index 2bbaed54..51000bac 100644 --- a/lib/ioctl_wrappers.c +++ b/lib/ioctl_wrappers.c @@ -1193,6 +1193,57 @@ bool gem_uses_full_ppgtt(int fd) } /** + * gem_gpu_reset_type: + * @fd: open i915 drm file descriptor + * + * Query whether reset-engine (2), global-reset (1) or reset-disable (0) + * is available. + * + * Returns: GPU reset type available + */ +int gem_gpu_reset_type(int fd) +{ + struct drm_i915_getparam gp; + int gpu_reset_type = -1; + + memset(&gp, 0, sizeof(gp)); + gp.param = I915_PARAM_HAS_GPU_RESET; + gp.value = &gpu_reset_type; + drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); + + return gpu_reset_type; +} + +/** + * gem_gpu_reset_enabled: + * @fd: open i915 drm file descriptor + * + * Feature test macro to check whether the kernel internally uses hangchecks + * and can reset the GPU upon hang detection. Note that this is also true when + * reset-engine (the lightweight, single engine reset) is available. + * + * Returns: Whether the driver will detect hangs and perform a reset. + */ +bool gem_gpu_reset_enabled(int fd) +{ + return gem_gpu_reset_type(fd) > 0; +} + +/** + * gem_engine_reset_enabled: + * @fd: open i915 drm file descriptor + * + * Feature test macro to check whether the kernel internally uses hangchecks + * and can reset individual engines upon hang detection. + * + * Returns: Whether the driver will detect hangs and perform an engine reset. + */ +bool gem_engine_reset_enabled(int fd) +{ + return gem_gpu_reset_type(fd) > 1; +} + +/** * gem_available_fences: * @fd: open i915 drm file descriptor * diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h index e1279d94..8915edca 100644 --- a/lib/ioctl_wrappers.h +++ b/lib/ioctl_wrappers.h @@ -166,6 +166,9 @@ bool gem_has_bsd2(int fd); int gem_gtt_type(int fd); bool gem_uses_ppgtt(int fd); bool gem_uses_full_ppgtt(int fd); +int gem_gpu_reset_type(int fd); +bool gem_gpu_reset_enabled(int fd); +bool gem_engine_reset_enabled(int fd); int gem_available_fences(int fd); uint64_t gem_total_mappable_size(int fd); uint64_t gem_total_stolen_size(int fd);