From patchwork Wed Jul 12 15:00:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowki X-Patchwork-Id: 9836941 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B99E9602BD for ; Wed, 12 Jul 2017 15:00:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC14E285EA for ; Wed, 12 Jul 2017 15:00:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A071A285F7; Wed, 12 Jul 2017 15:00:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3B8E7285EA for ; Wed, 12 Jul 2017 15:00:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DECBE6E015; Wed, 12 Jul 2017 15:00:47 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id C615B6E015 for ; Wed, 12 Jul 2017 15:00:45 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jul 2017 08:00:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.40,350,1496127600"; d="scan'208"; a="1194532411" Received: from linux.intel.com ([10.54.29.200]) by fmsmga002.fm.intel.com with ESMTP; 12 Jul 2017 08:00:27 -0700 Received: from workstation.fi.intel.com (workstation.fi.intel.com [10.237.68.144]) by linux.intel.com (Postfix) with ESMTP id D446B5804B7; Wed, 12 Jul 2017 08:00:25 -0700 (PDT) From: Paul Kocialkowski To: intel-gfx@lists.freedesktop.org Date: Wed, 12 Jul 2017 18:00:14 +0300 Message-Id: <20170712150014.3977-2-paul.kocialkowski@linux.intel.com> X-Mailer: git-send-email 2.13.2 In-Reply-To: <20170712150014.3977-1-paul.kocialkowski@linux.intel.com> References: <20170706132753.4241-1-paul.kocialkowski@linux.intel.com> <20170712150014.3977-1-paul.kocialkowski@linux.intel.com> Cc: Lyude Subject: [Intel-gfx] [PATCH i-g-t v2] tests/chamelium: Detect analogue bridges and handle EDID accordingly X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Nowadays, many VGA connectors are not actually native VGA but use a discrete bridge to a digital connector. These bridges usually enforce their own EDID instead of the one supplied by the chamelium. Thus, the EDID read test for VGA is not relevant in that case and should be skipped. Reported modes may also go beyond what the chamelium can support. Thus, only supported resolutions should be tested for the frame dump test and others should be pruned. Signed-off-by: Paul Kocialkowski --- tests/chamelium.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/tests/chamelium.c b/tests/chamelium.c index baaa424b..499672eb 100644 --- a/tests/chamelium.c +++ b/tests/chamelium.c @@ -105,6 +105,76 @@ wait_for_connector(data_t *data, struct chamelium_port *port, igt_assert(finished); } +static int chamelium_vga_modes[][2] = { + { 1600, 1200 }, + { 1920, 1200 }, + { 1920, 1080 }, + { 1680, 1050 }, + { 1280, 1024 }, + { 1280, 960 }, + { 1440, 900 }, + { 1280, 800 }, + { 1024, 768 }, + { 1360, 768 }, + { 1280, 720 }, + { 800, 600 }, + { 640, 480 }, + { -1, -1 }, +}; + +static bool +prune_vga_mode(data_t *data, drmModeModeInfo *mode) +{ + int i = 0; + + while (chamelium_vga_modes[i][0] != -1) { + if (mode->hdisplay == chamelium_vga_modes[i][0] && + mode->vdisplay == chamelium_vga_modes[i][1]) + return false; + + i++; + } + + return true; +} + +static bool +check_analogue_bridge(data_t *data, struct chamelium_port *port) +{ + drmModePropertyBlobPtr edid_blob = NULL; + drmModeConnector *connector = chamelium_port_get_connector( + data->chamelium, port, false); + uint64_t edid_blob_id; + unsigned char *edid; + char edid_vendor[3]; + + if (chamelium_port_get_type(port) != DRM_MODE_CONNECTOR_VGA) + return false; + + igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id, + DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL, + &edid_blob_id, NULL)); + igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd, + edid_blob_id)); + + edid = (unsigned char *) edid_blob->data; + + edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@'; + edid_vendor[1] = (((edid[8] & 0x03) << 3) | + ((edid[9] & 0xe0) >> 5)) + '@'; + edid_vendor[2] = (edid[9] & 0x1f) + '@'; + + /* Analogue bridges provide their own EDID */ + if (edid_vendor[0] != 'I' || edid_vendor[1] != 'G' || + edid_vendor[0] != 'T') + return true; + + drmModeFreePropertyBlob(edid_blob); + drmModeFreeConnector(connector); + + return false; +} + static void reset_state(data_t *data, struct chamelium_port *port) { @@ -168,6 +238,8 @@ test_edid_read(data_t *data, struct chamelium_port *port, chamelium_plug(data->chamelium, port); wait_for_connector(data, port, DRM_MODE_CONNECTED); + igt_skip_on(check_analogue_bridge(data, port)); + igt_assert(kmstest_get_property(data->drm_fd, connector->connector_id, DRM_MODE_OBJECT_CONNECTOR, "EDID", NULL, &edid_blob_id, NULL)); @@ -506,15 +578,21 @@ test_analogue_frame_dump(data_t *data, struct chamelium_port *port) drmModeModeInfo *mode; drmModeConnector *connector; int fb_id, i; + bool bridge; output = prepare_output(data, &display, port); connector = chamelium_port_get_connector(data->chamelium, port, false); primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY); igt_assert(primary); + bridge = check_analogue_bridge(data, port); + for (i = 0; i < connector->count_modes; i++) { mode = &connector->modes[i]; + if (bridge && prune_vga_mode(data, mode)) + continue; + fb_id = igt_create_color_pattern_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888,