From patchwork Tue Aug 8 08:08:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 9886791 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 35D05603F2 for ; Tue, 8 Aug 2017 08:09:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2863E283F2 for ; Tue, 8 Aug 2017 08:09:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1D5AB287C7; Tue, 8 Aug 2017 08:09:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BFD82287C8 for ; Tue, 8 Aug 2017 08:09:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C258899AB; Tue, 8 Aug 2017 08:09:24 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-vk0-x241.google.com (mail-vk0-x241.google.com [IPv6:2607:f8b0:400c:c05::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 96DD0899AB for ; Tue, 8 Aug 2017 08:09:22 +0000 (UTC) Received: by mail-vk0-x241.google.com with SMTP id r199so1492469vke.4 for ; Tue, 08 Aug 2017 01:09:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6lJbE4+qnr5qXHYIsHYu0dKWSR1wwwdaU6FayQmM4cQ=; b=QPuRiBObzMtdLNup4HwVlSqNB7JvG1uZN6RcxG0IeTPIqXrG7C6FO/9Cv5v1oJZ7RD pR74fRJQUggLvYhg2OOBfCtJMCSsvBjbUyJfjhyddGR/s7pRpIM7CGJTF4y2UrW10cNa 4Js2PO6JVqfqZAMfimT/muOt51X3tb+VOlqtc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6lJbE4+qnr5qXHYIsHYu0dKWSR1wwwdaU6FayQmM4cQ=; b=Yzr6Oq7JbIucz4OsFSIZ5TDOtaAWPSu7xo5Fj0m/VVHu2xTyBBo9+psPSMGuC1gvmf wAIAlK++JE/lyWvQA5tJjYTPou0zhmUtNVrJhwsAv86S+A3mjOx+oFYVir2Qh3qnkFr0 3qL+SUVLlejLiZUTJJXH4dCswi6WG2JmtWPUVGuILgzy3u/uhFe2pK2T7d2kVOuaczEF cCrTVmt8sZxzzrk5JguonoKqaICb6GJjUXo9PlBiw+qlxPGsgE9zt18U4DwHPSh4ED+D 3fSUYNGnjnJ7xLtG/eZyeAMwy/1DDvQBKaUiNsRC/WnrjC4LaxIjOEnAsAnnIOHVplPB LDKQ== X-Gm-Message-State: AHYfb5hwEMSwfiRI0atiAisxuu7XxZRuDqATobG/ditkCKlnoHbKhYWh DGoMMaUnC/F00YPvQjc= X-Received: by 10.80.158.40 with SMTP id z37mr3538574ede.9.1502179761106; Tue, 08 Aug 2017 01:09:21 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:5640:0:960b:2678:e223:c1c6]) by smtp.gmail.com with ESMTPSA id w31sm638124edd.30.2017.08.08.01.09.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Aug 2017 01:09:16 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Tue, 8 Aug 2017 10:08:27 +0200 Message-Id: <20170808080828.23650-2-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170808080828.23650-1-daniel.vetter@ffwll.ch> References: <20170808080828.23650-1-daniel.vetter@ffwll.ch> Cc: Daniel Vetter , Daniel Vetter , Mika Kuoppala Subject: [Intel-gfx] [PATCH 2/3] drm/i915: Push i915_sw_fence_wait into the nonblocking atomic commit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Blocking in a worker is ok, that's what the unbound_wq is for. And it unifies the paths between the blocking and nonblocking commit, giving me just one path where I have to implement the deadlock avoidance trickery in the next patch. I first tried to implement the following patch without this rework, but force-completing i915_sw_fence creates some serious challenges around properly cleaning things up. So wasn't a feasible short-term approach. Another approach would be to simple keep track of all pending atomic commit work items and manually queue them from the reset code. With the caveat that double-queue in case we race with the i915_sw_fence must be avoided. Given all that, taking the cost of a double schedule in atomic for the short-term fix is the best approach, but can be changed in the future of course. v2: Amend commit message (Chris). v3: Add comment explaining why we do nothing in the sw_fence complete callback (Michel). Reviewed-by: Maarten Lankhorst Cc: Chris Wilson Cc: Mika Kuoppala Cc: Joonas Lahtinen Cc: Tvrtko Ursulin (v2) Cc: Michel Thierry Reviewed-by: Michel Thierry Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b2c220ba2575..da8d0d3b2bc2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12082,6 +12082,8 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state) unsigned crtc_vblank_mask = 0; int i; + i915_sw_fence_wait(&intel_state->commit_ready); + drm_atomic_helper_wait_for_dependencies(state); if (intel_state->modeset) @@ -12247,10 +12249,8 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence, switch (notify) { case FENCE_COMPLETE: - if (state->base.commit_work.func) - queue_work(system_unbound_wq, &state->base.commit_work); + /* we do blocking waits in the worker, nothing to do here */ break; - case FENCE_FREE: { struct intel_atomic_helper *helper = @@ -12352,14 +12352,14 @@ static int intel_atomic_commit(struct drm_device *dev, } drm_atomic_state_get(state); - INIT_WORK(&state->commit_work, - nonblock ? intel_atomic_commit_work : NULL); + INIT_WORK(&state->commit_work, intel_atomic_commit_work); i915_sw_fence_commit(&intel_state->commit_ready); - if (!nonblock) { - i915_sw_fence_wait(&intel_state->commit_ready); + if (nonblock) + queue_work(system_unbound_wq, &state->commit_work); + else intel_atomic_commit_tail(state); - } + return 0; }