| Message ID | 20171103151816.62048-3-michal.wajdeczko@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 11/3/2017 8:48 PM, Michal Wajdeczko wrote: > We don't keep the workarounds for pre-production hardware > (see intel_detect_preproduction_hw) thus we can drop some > extra steps during firmware upload needed only for unsupported > platforms. > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > --- > drivers/gpu/drm/i915/intel_guc_fw.c | 10 ---------- > 1 file changed, 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c > index 74a61fe..a63b5cf 100644 > --- a/drivers/gpu/drm/i915/intel_guc_fw.c > +++ b/drivers/gpu/drm/i915/intel_guc_fw.c > @@ -104,16 +104,6 @@ static void guc_prepare_xfer(struct intel_guc *guc) > /* Enable MIA caching. GuC clock gating is disabled. */ > I915_WRITE(GUC_SHIM_CONTROL, GUC_SHIM_CONTROL_VALUE); > > - /* WaDisableMinuteIaClockGating:bxt */ > - if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_A1)) { > - I915_WRITE(GUC_SHIM_CONTROL, (I915_READ(GUC_SHIM_CONTROL) & > - ~GUC_ENABLE_MIA_CLOCK_GATING)); > - } > - > - /* WaC6DisallowByGfxPause:bxt */ > - if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0)) > - I915_WRITE(GEN6_GFXPAUSE, 0x30FFF); > - > if (IS_GEN9_LP(dev_priv)) > I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE); > else
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index 74a61fe..a63b5cf 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -104,16 +104,6 @@ static void guc_prepare_xfer(struct intel_guc *guc) /* Enable MIA caching. GuC clock gating is disabled. */ I915_WRITE(GUC_SHIM_CONTROL, GUC_SHIM_CONTROL_VALUE); - /* WaDisableMinuteIaClockGating:bxt */ - if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_A1)) { - I915_WRITE(GUC_SHIM_CONTROL, (I915_READ(GUC_SHIM_CONTROL) & - ~GUC_ENABLE_MIA_CLOCK_GATING)); - } - - /* WaC6DisallowByGfxPause:bxt */ - if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0)) - I915_WRITE(GEN6_GFXPAUSE, 0x30FFF); - if (IS_GEN9_LP(dev_priv)) I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE); else
We don't keep the workarounds for pre-production hardware (see intel_detect_preproduction_hw) thus we can drop some extra steps during firmware upload needed only for unsupported platforms. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> --- drivers/gpu/drm/i915/intel_guc_fw.c | 10 ---------- 1 file changed, 10 deletions(-)