diff mbox

drm/i915: Don't sanitize frame start delay if the pipe is off

Message ID 20171115200442.15051-1-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä Nov. 15, 2017, 8:04 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Avoid touching PIPECONF in intel_sanitize_crtc() unless the pipe is
actually on. Should cure some unclaimed register accesses.

We don't have to sanitize this if the pipe is off since we will
overwrite the frame start delay anyway when turning the pipe on.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102249
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Chris Wilson Nov. 15, 2017, 8:17 p.m. UTC | #1 
Quoting Ville Syrjala (2017-11-15 20:04:42)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Avoid touching PIPECONF in intel_sanitize_crtc() unless the pipe is
> actually on. Should cure some unclaimed register accesses.

While using crtc->active is consistent with other sanitization, is this
really a fix for unclaimed register access?

We should be holding all the powerwells at this moment in bringing up
the hw, right? So the only unclaimed access would be if the reg didn't
exist. So are we looking at an invalid cpu_transcoder?
-Chris
Ville Syrjälä Nov. 15, 2017, 8:35 p.m. UTC | #2 
On Wed, Nov 15, 2017 at 08:17:21PM +0000, Chris Wilson wrote:
> Quoting Ville Syrjala (2017-11-15 20:04:42)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Avoid touching PIPECONF in intel_sanitize_crtc() unless the pipe is
> > actually on. Should cure some unclaimed register accesses.
> 
> While using crtc->active is consistent with other sanitization, is this
> really a fix for unclaimed register access?
> 
> We should be holding all the powerwells at this moment in bringing up
> the hw, right? So the only unclaimed access would be if the reg didn't
> exist. So are we looking at an invalid cpu_transcoder?

I was thinking we'd have dropped the power references already. But
I guess not. And that should definitely then give unclaimed register
accesses during driver init.

I think these fails are in the "pretend display gets clobbered by GPU
reset" path. And there we don't actually seem to grabbing the init power
reference, which could well explain this. 

Not sure we want to add the init power there either. Most of the readout
code now has the power domain handling in place, so maybe we're close
to being able to nuke the init power thing entirely?
Chris Wilson Nov. 15, 2017, 9:08 p.m. UTC | #3 
Quoting Ville Syrjälä (2017-11-15 20:35:41)
> On Wed, Nov 15, 2017 at 08:17:21PM +0000, Chris Wilson wrote:
> > Quoting Ville Syrjala (2017-11-15 20:04:42)
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Avoid touching PIPECONF in intel_sanitize_crtc() unless the pipe is
> > > actually on. Should cure some unclaimed register accesses.
> > 
> > While using crtc->active is consistent with other sanitization, is this
> > really a fix for unclaimed register access?
> > 
> > We should be holding all the powerwells at this moment in bringing up
> > the hw, right? So the only unclaimed access would be if the reg didn't
> > exist. So are we looking at an invalid cpu_transcoder?
> 
> I was thinking we'd have dropped the power references already. But
> I guess not. And that should definitely then give unclaimed register
> accesses during driver init.
> 
> I think these fails are in the "pretend display gets clobbered by GPU
> reset" path. And there we don't actually seem to grabbing the init power
> reference, which could well explain this. 

Hmm, it is in reset's __intel_dsiplay_resume() so that's a likely
candidate.

> Not sure we want to add the init power there either. Most of the readout
> code now has the power domain handling in place, so maybe we're close
> to being able to nuke the init power thing entirely?

But for reset, shouldn't we be taking the display powerwells in
intel_prepare_reset() or is that already there buried away in the
indirection?

Oh, that intel_display_set_init_power() definitely seems out of place
along reset.
-Chris
Chris Wilson Nov. 15, 2017, 9:13 p.m. UTC | #4 
Quoting Ville Syrjala (2017-11-15 20:04:42)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Avoid touching PIPECONF in intel_sanitize_crtc() unless the pipe is
> actually on. Should cure some unclaimed register accesses.
+ during reset, as we are rather cavalier in our approach to powerdomain
management.

> We don't have to sanitize this if the pipe is off since we will
> overwrite the frame start delay anyway when turning the pipe on.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102249
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Let's not even get started on the handling of modesets vs display reset.
-Chris
Ville Syrjälä Nov. 16, 2017, 3:12 p.m. UTC | #5 
On Wed, Nov 15, 2017 at 09:17:01PM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Don't sanitize frame start delay if the pipe is off
> URL   : https://patchwork.freedesktop.org/series/33901/
> State : success
> 
> == Summary ==
> 
> Test kms_busy:
>         Subgroup extended-modeset-hang-newfb-with-reset-render-a:
>                 dmesg-warn -> PASS       (shard-hsw) fdo#102249
>         Subgroup extended-modeset-hang-newfb-with-reset-render-b:
>                 dmesg-warn -> PASS       (shard-hsw) fdo#103038
> Test drv_module_reload:
>         Subgroup basic-reload-inject:
>                 dmesg-warn -> PASS       (shard-hsw) fdo#102707
> 
> fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
> fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038

Oh we had two bugs for the same thing.

> fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707

This one is the fb leak. Not fixed by the patch, just fails randomly it
seems.

> 
> shard-hsw        total:2584 pass:1473 dwarn:2   dfail:1   fail:9   skip:1099 time:9603s
> Blacklisted hosts:
> shard-apl        total:2565 pass:1602 dwarn:3   dfail:1   fail:22  skip:936 time:13167s
> shard-kbl        total:2500 pass:1613 dwarn:48  dfail:4   fail:23  skip:810 time:10513s
> shard-snb        total:2584 pass:1259 dwarn:2   dfail:1   fail:11  skip:1311 time:8110s
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7151/shards.html
Ville Syrjälä Nov. 16, 2017, 3:22 p.m. UTC | #6 
On Wed, Nov 15, 2017 at 09:13:28PM +0000, Chris Wilson wrote:
> Quoting Ville Syrjala (2017-11-15 20:04:42)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Avoid touching PIPECONF in intel_sanitize_crtc() unless the pipe is
> > actually on. Should cure some unclaimed register accesses.
> + during reset, as we are rather cavalier in our approach to powerdomain
> management.

Amended, and pushed. Thanks.

> 
> > We don't have to sanitize this if the pipe is off since we will
> > overwrite the frame start delay anyway when turning the pipe on.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102249
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> 
> Let's not even get started on the handling of modesets vs display reset.
> -Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 23aa7191024e..e6fcbc5abc75 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14812,7 +14812,7 @@  static void intel_sanitize_crtc(struct intel_crtc *crtc,
 	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
 
 	/* Clear any frame start delays used for debugging left by the BIOS */
-	if (!transcoder_is_dsi(cpu_transcoder)) {
+	if (crtc->active && !transcoder_is_dsi(cpu_transcoder)) {
 		i915_reg_t reg = PIPECONF(cpu_transcoder);
 
 		I915_WRITE(reg,