[i-g-t,1/3] igt_dummyload: Add preemptible parameter to spinning batch.

Message ID	20171204172315.25487-1-antonio.argenziano@intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Antonio Argenziano <antonio.argenziano@intel.com> To: intel-gfx@lists.freedesktop.org Date: Mon, 4 Dec 2017 09:23:13 -0800 Message-Id: <20171204172315.25487-1-antonio.argenziano@intel.com> Subject: [Intel-gfx] [PATCH i-g-t 1/3] igt_dummyload: Add preemptible parameter to spinning batch. Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index bb2be557..8dd78495 100644 --- a/lib/igt_dummyload.c +++ b/lib/igt_dummyload.c @@ -71,7 +71,7 @@ fill_reloc(struct drm_i915_gem_relocation_entry *reloc, static void emit_recursive_batch(igt_spin_t *spin, int fd, uint32_t ctx, unsigned engine, - uint32_t dep) + uint32_t dep, bool preemptible) { #define SCRATCH 0 #define BATCH 1 @@ -122,8 +122,8 @@ static void emit_recursive_batch(igt_spin_t *spin, spin->batch = batch; spin->handle = obj[BATCH].handle; - /* Allow ourselves to be preempted */ - *batch++ = MI_ARB_CHK; + if (preemptible) + *batch++ = MI_ARB_CHK; /* Allow ourselves to be preempted */ /* Pad with a few nops so that we do not completely hog the system. * @@ -172,14 +172,15 @@ static void emit_recursive_batch(igt_spin_t *spin, } igt_spin_t * -__igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep) +__igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, + uint32_t dep, bool preemptible) { igt_spin_t *spin; spin = calloc(1, sizeof(struct igt_spin)); igt_assert(spin); - emit_recursive_batch(spin, fd, ctx, engine, dep); + emit_recursive_batch(spin, fd, ctx, engine, dep, preemptible); igt_assert(gem_bo_busy(fd, spin->handle)); igt_list_add(&spin->link, &spin_list); @@ -194,6 +195,8 @@ __igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep) * than 0, execute on all available rings. * @dep: handle to a buffer object dependency. If greater than 0, add a * relocation entry to this buffer within the batch. + * @preemptible: Whether spinning batch would execute a preemtible instruction + * or not. * * Start a recursive batch on a ring. Immediately returns a #igt_spin_t that * contains the batch's handle that can be waited upon. The returned structure @@ -203,11 +206,12 @@ __igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep) * Structure with helper internal state for igt_spin_batch_free(). */ igt_spin_t * -igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep) +igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, + uint32_t dep, bool preemptible) { igt_require_gem(fd); - return __igt_spin_batch_new(fd, ctx, engine, dep); + return __igt_spin_batch_new(fd, ctx, engine, dep, preemptible); } static void notify(union sigval arg) diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h index 215425f7..8660f1b1 100644 --- a/lib/igt_dummyload.h +++ b/lib/igt_dummyload.h @@ -40,11 +40,13 @@ typedef struct igt_spin { igt_spin_t *__igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, - uint32_t dep); + uint32_t dep, + bool preemptible); igt_spin_t *igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, - uint32_t dep); + uint32_t dep, + bool preemptible); void igt_spin_batch_set_timeout(igt_spin_t *spin, int64_t ns); void igt_spin_batch_end(igt_spin_t *spin); void igt_spin_batch_free(int fd, igt_spin_t *spin); diff --git a/tests/drv_missed_irq.c b/tests/drv_missed_irq.c index 9326a5a6..56220471 100644 --- a/tests/drv_missed_irq.c +++ b/tests/drv_missed_irq.c @@ -33,7 +33,7 @@ IGT_TEST_DESCRIPTION("Inject missed interrupts and make sure they are caught"); static void trigger_missed_interrupt(int fd, unsigned ring) { - igt_spin_t *spin = __igt_spin_batch_new(fd, 0, ring, 0); + igt_spin_t *spin = __igt_spin_batch_new(fd, 0, ring, 0, true); igt_fork(child, 1) { /* We are now a low priority child on the *same* CPU as the diff --git a/tests/gem_busy.c b/tests/gem_busy.c index 2b88270b..67a12245 100644 --- a/tests/gem_busy.c +++ b/tests/gem_busy.c @@ -460,7 +460,7 @@ static bool has_semaphores(int fd) static bool has_extended_busy_ioctl(int fd) { - igt_spin_t *spin = igt_spin_batch_new(fd, 0, I915_EXEC_RENDER, 0); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, I915_EXEC_RENDER, 0, true); uint32_t read, write; __gem_busy(fd, spin->handle, &read, &write); @@ -471,7 +471,7 @@ static bool has_extended_busy_ioctl(int fd) static void basic(int fd, unsigned ring, unsigned flags) { - igt_spin_t *spin = igt_spin_batch_new(fd, 0, ring, 0); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, ring, 0, true); struct timespec tv; int timeout; bool busy; diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c index 6ee944ff..e74f5c62 100644 --- a/tests/gem_exec_fence.c +++ b/tests/gem_exec_fence.c @@ -438,7 +438,7 @@ static void test_parallel(int fd, unsigned int master) /* Fill the queue with many requests so that the next one has to * wait before it can be executed by the hardware. */ - spin = igt_spin_batch_new(fd, 0, master, c.handle); + spin = igt_spin_batch_new(fd, 0, master, c.handle, true); resubmit(fd, spin->handle, master, 16); /* Now queue the master request and its secondaries */ @@ -961,7 +961,7 @@ static void test_syncobj_unused_fence(int fd) struct local_gem_exec_fence fence = { .handle = syncobj_create(fd), }; - igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0, true); /* sanity check our syncobj_to_sync_file interface */ igt_assert_eq(__syncobj_to_sync_file(fd, 0), -ENOENT); @@ -1053,7 +1053,7 @@ static void test_syncobj_signal(int fd) struct local_gem_exec_fence fence = { .handle = syncobj_create(fd), }; - igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0, true); /* Check that the syncobj is signaled only when our request/fence is */ @@ -1103,7 +1103,7 @@ static void test_syncobj_wait(int fd) gem_quiescent_gpu(fd); - spin = igt_spin_batch_new(fd, 0, 0, 0); + spin = igt_spin_batch_new(fd, 0, 0, 0, true); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = to_user_pointer(&obj); @@ -1173,7 +1173,7 @@ static void test_syncobj_export(int fd) .handle = syncobj_create(fd), }; int export[2]; - igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0, true); /* Check that if we export the syncobj prior to use it picks up * the later fence. This allows a syncobj to establish a channel @@ -1231,7 +1231,7 @@ static void test_syncobj_repeat(int fd) struct drm_i915_gem_execbuffer2 execbuf; struct local_gem_exec_fence *fence; int export; - igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0, true); /* Check that we can wait on the same fence multiple times */ fence = calloc(nfences, sizeof(*fence)); @@ -1286,7 +1286,7 @@ static void test_syncobj_import(int fd) const uint32_t bbe = MI_BATCH_BUFFER_END; struct drm_i915_gem_exec_object2 obj; struct drm_i915_gem_execbuffer2 execbuf; - igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, 0, 0, true); uint32_t sync = syncobj_create(fd); int fence; diff --git a/tests/gem_exec_latency.c b/tests/gem_exec_latency.c index 850404b9..fda1f9e0 100644 --- a/tests/gem_exec_latency.c +++ b/tests/gem_exec_latency.c @@ -344,7 +344,7 @@ static void latency_from_ring(int fd, I915_GEM_DOMAIN_GTT); if (flags & PREEMPT) - spin = igt_spin_batch_new(fd, ctx[0], ring, 0); + spin = igt_spin_batch_new(fd, ctx[0], ring, 0, true); if (flags & CORK) { plug(fd, &c); diff --git a/tests/gem_exec_nop.c b/tests/gem_exec_nop.c index b5f15807..5635b898 100644 --- a/tests/gem_exec_nop.c +++ b/tests/gem_exec_nop.c @@ -620,7 +620,7 @@ static void preempt(int fd, uint32_t handle, clock_gettime(CLOCK_MONOTONIC, &start); do { igt_spin_t *spin = - __igt_spin_batch_new(fd, ctx[0], ring_id, 0); + __igt_spin_batch_new(fd, ctx[0], ring_id, 0, true); for (int loop = 0; loop < 1024; loop++) gem_execbuf(fd, &execbuf); diff --git a/tests/gem_exec_reloc.c b/tests/gem_exec_reloc.c index 432a42a9..e7560766 100644 --- a/tests/gem_exec_reloc.c +++ b/tests/gem_exec_reloc.c @@ -388,7 +388,8 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags) } if (flags & ACTIVE) { - spin = igt_spin_batch_new(fd, 0, I915_EXEC_DEFAULT, obj.handle); + spin = igt_spin_batch_new(fd, 0, I915_EXEC_DEFAULT, + obj.handle, true); if (!(flags & HANG)) igt_spin_batch_set_timeout(spin, NSEC_PER_SEC/100); igt_assert(gem_bo_busy(fd, obj.handle)); @@ -454,7 +455,8 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags) } if (flags & ACTIVE) { - spin = igt_spin_batch_new(fd, 0, I915_EXEC_DEFAULT, obj.handle); + spin = igt_spin_batch_new(fd, 0, I915_EXEC_DEFAULT, + obj.handle, true); if (!(flags & HANG)) igt_spin_batch_set_timeout(spin, NSEC_PER_SEC/100); igt_assert(gem_bo_busy(fd, obj.handle)); @@ -581,7 +583,7 @@ static void basic_range(int fd, unsigned flags) execbuf.buffer_count = n + 1; if (flags & ACTIVE) { - spin = igt_spin_batch_new(fd, 0, 0, obj[n].handle); + spin = igt_spin_batch_new(fd, 0, 0, obj[n].handle, true); if (!(flags & HANG)) igt_spin_batch_set_timeout(spin, NSEC_PER_SEC/100); igt_assert(gem_bo_busy(fd, obj[n].handle)); diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c index a2f4419a..1e6b0ae7 100644 --- a/tests/gem_exec_schedule.c +++ b/tests/gem_exec_schedule.c @@ -147,7 +147,7 @@ static void unplug_show_queue(int fd, struct cork *c, unsigned int engine) for (int n = 0; n < ARRAY_SIZE(spin); n++) { uint32_t ctx = create_highest_priority(fd); - spin[n] = __igt_spin_batch_new(fd, ctx, engine, 0); + spin[n] = __igt_spin_batch_new(fd, ctx, engine, 0, true); gem_context_destroy(fd, ctx); } @@ -376,7 +376,7 @@ static void preempt(int fd, unsigned ring, unsigned flags) ctx[LO] = gem_context_create(fd); gem_context_set_priority(fd, ctx[LO], MIN_PRIO); } - spin[n] = __igt_spin_batch_new(fd, ctx[LO], ring, 0); + spin[n] = __igt_spin_batch_new(fd, ctx[LO], ring, 0, true); igt_debug("spin[%d].handle=%d\n", n, spin[n]->handle); store_dword(fd, ctx[HI], ring, result, 0, n + 1, 0, I915_GEM_DOMAIN_RENDER); @@ -425,7 +425,7 @@ static void preempt_other(int fd, unsigned ring) n = 0; for_each_engine(fd, other) { - spin[n] = __igt_spin_batch_new(fd, ctx[NOISE], other, 0); + spin[n] = __igt_spin_batch_new(fd, ctx[NOISE], other, 0, true); store_dword(fd, ctx[LO], other, result, (n + 1)*sizeof(uint32_t), n + 1, 0, I915_GEM_DOMAIN_RENDER); @@ -478,7 +478,7 @@ static void preempt_self(int fd, unsigned ring) n = 0; gem_context_set_priority(fd, ctx[HI], MIN_PRIO); for_each_engine(fd, other) { - spin[n] = __igt_spin_batch_new(fd, ctx[NOISE], other, 0); + spin[n] = __igt_spin_batch_new(fd, ctx[NOISE], other, 0, true); store_dword(fd, ctx[HI], other, result, (n + 1)*sizeof(uint32_t), n + 1, 0, I915_GEM_DOMAIN_RENDER); diff --git a/tests/gem_exec_suspend.c b/tests/gem_exec_suspend.c index bbdc6e55..099893f9 100644 --- a/tests/gem_exec_suspend.c +++ b/tests/gem_exec_suspend.c @@ -201,7 +201,7 @@ static void run_test(int fd, unsigned engine, unsigned flags) } if (flags & HANG) - spin = igt_spin_batch_new(fd, 0, engine, 0); + spin = igt_spin_batch_new(fd, 0, engine, 0, true); switch (mode(flags)) { case NOSLEEP: diff --git a/tests/gem_shrink.c b/tests/gem_shrink.c index 06f7a301..1a4e1e29 100644 --- a/tests/gem_shrink.c +++ b/tests/gem_shrink.c @@ -311,9 +311,9 @@ static void reclaim(unsigned engine, int timeout) } while (!*shared); } - spin = igt_spin_batch_new(fd, 0, engine, 0); + spin = igt_spin_batch_new(fd, 0, engine, 0, true); igt_until_timeout(timeout) { - igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0); + igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0, true); igt_spin_batch_set_timeout(spin, timeout_100ms); gem_sync(fd, spin->handle); diff --git a/tests/gem_spin_batch.c b/tests/gem_spin_batch.c index 89631130..64e9f0a9 100644 --- a/tests/gem_spin_batch.c +++ b/tests/gem_spin_batch.c @@ -41,9 +41,9 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec) struct timespec itv = { }; uint64_t elapsed; - spin = igt_spin_batch_new(fd, 0, engine, 0); + spin = igt_spin_batch_new(fd, 0, engine, 0, true); while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout_sec) { - igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0); + igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0, true); igt_spin_batch_set_timeout(spin, timeout_100ms - igt_nsec_elapsed(&itv)); diff --git a/tests/gem_sync.c b/tests/gem_sync.c index 36180aee..daa574a7 100644 --- a/tests/gem_sync.c +++ b/tests/gem_sync.c @@ -759,7 +759,8 @@ preempt(int fd, unsigned ring, int num_children, int timeout) __igt_spin_batch_new(fd, ctx[0], execbuf.flags, - 0); + 0, + true); do { gem_execbuf(fd, &execbuf); diff --git a/tests/gem_wait.c b/tests/gem_wait.c index cf8c8154..b675ce1b 100644 --- a/tests/gem_wait.c +++ b/tests/gem_wait.c @@ -110,7 +110,7 @@ static void unplug(struct cork *c) static void basic(int fd, unsigned engine, unsigned flags) { struct cork cork = plug(fd, flags); - igt_spin_t *spin = igt_spin_batch_new(fd, 0, engine, cork.handle); + igt_spin_t *spin = igt_spin_batch_new(fd, 0, engine, cork.handle, true); struct drm_i915_gem_wait wait = { flags & WRITE ? cork.handle : spin->handle }; diff --git a/tests/kms_busy.c b/tests/kms_busy.c index 0828a8b3..9ada5805 100644 --- a/tests/kms_busy.c +++ b/tests/kms_busy.c @@ -92,7 +92,7 @@ static void flip_to_fb(igt_display_t *dpy, int pipe, struct drm_event_vblank ev; igt_spin_t *t = igt_spin_batch_new(dpy->drm_fd, - 0, ring, fb->gem_handle); + 0, ring, fb->gem_handle, true); if (modeset) { /* @@ -208,7 +208,7 @@ static void test_atomic_commit_hang(igt_display_t *dpy, igt_plane_t *primary, struct igt_fb *busy_fb, unsigned ring) { igt_spin_t *t = igt_spin_batch_new(dpy->drm_fd, - 0, ring, busy_fb->gem_handle); + 0, ring, busy_fb->gem_handle, true); struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN }; unsigned flags = 0; struct drm_event_vblank ev; @@ -295,7 +295,7 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy, igt_display_commit2(dpy, dpy->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY); - t = igt_spin_batch_new(dpy->drm_fd, 0, ring, fb.gem_handle); + t = igt_spin_batch_new(dpy->drm_fd, 0, ring, fb.gem_handle, true); do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb)); diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c index 5720dbef..7d7a6f68 100644 --- a/tests/kms_cursor_legacy.c +++ b/tests/kms_cursor_legacy.c @@ -532,7 +532,8 @@ static void basic_flip_cursor(igt_display_t *display, spin = NULL; if (flags & BASIC_BUSY) - spin = igt_spin_batch_new(display->drm_fd, 0, 0, fb_info.gem_handle); + spin = igt_spin_batch_new(display->drm_fd, 0, 0, + fb_info.gem_handle, true); /* Start with a synchronous query to align with the vblank */ vblank_start = get_vblank(display->drm_fd, pipe, DRM_VBLANK_NEXTONMISS); @@ -1299,7 +1300,7 @@ static void flip_vs_cursor_busy_crc(igt_display_t *display, bool atomic) static const int max_crcs = 8; spin = igt_spin_batch_new(display->drm_fd, 0, 0, - fb_info[1].gem_handle); + fb_info[1].gem_handle, true); vblank_start = get_vblank(display->drm_fd, pipe, DRM_VBLANK_NEXTONMISS); diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 4d5579e4..602cbae7 100644 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c @@ -693,14 +693,14 @@ static unsigned int run_test_step(struct test_output *o) if (o->flags & TEST_WITH_DUMMY_BCS) { spin_bcs = igt_spin_batch_new(drm_fd, 0, I915_EXEC_BLT, - o->fb_info[o->current_fb_id].gem_handle); + o->fb_info[o->current_fb_id].gem_handle, true); igt_spin_batch_set_timeout(spin_bcs, NSEC_PER_SEC); } if (o->flags & TEST_WITH_DUMMY_RCS) { spin_rcs = igt_spin_batch_new(drm_fd, 0, I915_EXEC_RENDER, - o->fb_info[o->current_fb_id].gem_handle); + o->fb_info[o->current_fb_id].gem_handle, true); igt_spin_batch_set_timeout(spin_rcs, NSEC_PER_SEC); } diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c index cb59bf5d..0c4f3ffb 100644 --- a/tests/perf_pmu.c +++ b/tests/perf_pmu.c @@ -141,7 +141,7 @@ single(int gem_fd, const struct intel_execution_engine2 *e, bool busy) fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance)); if (busy) { - spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0); + spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0, true); igt_spin_batch_set_timeout(spin, batch_duration_ns); } else { usleep(batch_duration_ns / 1000); @@ -203,7 +203,7 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e, igt_assert_eq(i, num_engines); - spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0); + spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0, true); igt_spin_batch_set_timeout(spin, batch_duration_ns); gem_sync(gem_fd, spin->handle); @@ -249,7 +249,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e, idle_idx = i; } else { spin[i] = igt_spin_batch_new(gem_fd, 0, - e2ring(gem_fd, e_), 0); + e2ring(gem_fd, e_), 0, true); igt_spin_batch_set_timeout(spin[i], batch_duration_ns); } @@ -297,7 +297,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines) fd[i] = open_group(I915_PMU_ENGINE_BUSY(e->class, e->instance), fd[0]); - spin[i] = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0); + spin[i] = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0, true); igt_spin_batch_set_timeout(spin[i], batch_duration_ns); i++; @@ -328,7 +328,7 @@ no_sema(int gem_fd, const struct intel_execution_engine2 *e, bool busy) open_group(I915_PMU_ENGINE_WAIT(e->class, e->instance), fd); if (busy) { - spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0); + spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0, true); igt_spin_batch_set_timeout(spin, batch_duration_ns); } else { usleep(batch_duration_ns / 1000); @@ -637,7 +637,7 @@ multi_client(int gem_fd, const struct intel_execution_engine2 *e) */ fd[1] = open_pmu(config); - spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0); + spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0, true); igt_spin_batch_set_timeout(spin, 2 * batch_duration_ns); slept = measured_usleep(batch_duration_ns / 1000); @@ -742,7 +742,7 @@ static void cpu_hotplug(int gem_fd) fd = perf_i915_open(I915_PMU_ENGINE_BUSY(I915_ENGINE_CLASS_RENDER, 0)); igt_assert(fd >= 0); - spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0); + spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0, true); igt_nsec_elapsed(&start); @@ -855,7 +855,7 @@ test_interrupts(int gem_fd) gem_quiescent_gpu(gem_fd); fd = open_pmu(I915_PMU_INTERRUPTS); - spin = igt_spin_batch_new(gem_fd, 0, 0, 0); + spin = igt_spin_batch_new(gem_fd, 0, 0, 0, true); obj.handle = gem_create(gem_fd, sz); gem_write(gem_fd, obj.handle, sz - sizeof(bbe), &bbe, sizeof(bbe)); @@ -937,7 +937,7 @@ test_frequency(int gem_fd) pmu_read_multi(fd, 2, start); - spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0); + spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0, true); igt_spin_batch_set_timeout(spin, duration_ns); gem_sync(gem_fd, spin->handle); @@ -962,7 +962,7 @@ test_frequency(int gem_fd) pmu_read_multi(fd, 2, start); - spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0); + spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0, true); igt_spin_batch_set_timeout(spin, duration_ns); gem_sync(gem_fd, spin->handle); diff --git a/tests/pm_rps.c b/tests/pm_rps.c index cc94813e..f6f1fa90 100644 --- a/tests/pm_rps.c +++ b/tests/pm_rps.c @@ -588,7 +588,7 @@ static void boost_freq(int fd, int *boost_freqs) engine = I915_EXEC_RENDER; if (intel_gen(lh.devid) >= 6) engine = I915_EXEC_BLT; - load = igt_spin_batch_new(fd, 0, engine, 0); + load = igt_spin_batch_new(fd, 0, engine, 0, true); /* Waiting will grant us a boost to maximum */ gem_wait(fd, load->handle, &timeout);

[i-g-t,1/3] igt_dummyload: Add preemptible parameter to spinning batch.

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Patch