From patchwork Mon Dec 18 15:35:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lionel Landwerlin X-Patchwork-Id: 10120183 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 742FD6057F for ; Mon, 18 Dec 2017 15:35:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6757B28558 for ; Mon, 18 Dec 2017 15:35:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5C78928739; Mon, 18 Dec 2017 15:35:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1A7B328AFD for ; Mon, 18 Dec 2017 15:35:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7824B6E1D1; Mon, 18 Dec 2017 15:35:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 39FDB6E1CD for ; Mon, 18 Dec 2017 15:35:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Dec 2017 07:35:29 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,422,1508828400"; d="scan'208";a="3760644" Received: from delly.ld.intel.com ([10.103.238.204]) by orsmga008.jf.intel.com with ESMTP; 18 Dec 2017 07:35:28 -0800 From: Lionel Landwerlin To: intel-gfx@lists.freedesktop.org Date: Mon, 18 Dec 2017 15:35:18 +0000 Message-Id: <20171218153520.14181-5-lionel.g.landwerlin@intel.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171218153520.14181-1-lionel.g.landwerlin@intel.com> References: <20171218153520.14181-1-lionel.g.landwerlin@intel.com> Subject: [Intel-gfx] [PATCH 4/6] drm/i915: add rcs topology to error state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This might be useful information for developers looking at an error state. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_gpu_error.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index aba50aa613f1..ba0e4cd082c4 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -621,6 +621,40 @@ static void err_print_uc(struct drm_i915_error_state_buf *m, print_error_obj(m, NULL, "GuC log buffer", error_uc->guc_log); } +static void err_print_rcs_topology(struct drm_i915_error_state_buf *m, + const struct sseu_dev_info *sseu) +{ + int s, ss; + int subslice_stride = ALIGN(sseu->max_eus_per_subslice, 8) / 8; + int slice_stride = sseu->max_subslices * subslice_stride; + + /* Unavailable prior to Gen 8. */ + if (sseu->max_slices == 0) + return; + + err_printf(m, "RCS topology:\n"); + + for (s = 0; s < sseu->max_slices; s++) { + err_printf(m, " slice%i (subslice_mask=0x%x):\n", + s, sseu->subslices_mask[s]); + + for (ss = 0; ss < slice_stride / subslice_stride; ss++) { + int eu, n_subslice_eus = 0; + + err_printf(m, " subslice%i:\n", ss); + + err_printf(m, " eu_mask:"); + for (eu = 0; eu < subslice_stride; eu++) { + u8 val = sseu->eu_mask[s * slice_stride + + ss * subslice_stride + eu]; + err_printf(m, " 0x%x", val); + n_subslice_eus += hweight8(val); + } + err_printf(m, " (%i)\n", n_subslice_eus); + } + } +} + int i915_error_state_to_str(struct drm_i915_error_state_buf *m, const struct i915_gpu_state *error) { @@ -657,6 +691,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m, err_printf(m, "Suspend count: %u\n", error->suspend_count); err_printf(m, "Platform: %s\n", intel_platform_name(error->device_info.platform)); err_print_pciid(m, error->i915); + err_print_rcs_topology(m, &INTEL_INFO(dev_priv)->sseu); err_printf(m, "IOMMU enabled?: %d\n", error->iommu);