From patchwork Tue Jan 9 23:28:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 10153673 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9D9F0602CA for ; Tue, 9 Jan 2018 23:29:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 93C62268AE for ; Tue, 9 Jan 2018 23:29:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 88B2F269E2; Tue, 9 Jan 2018 23:29:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 38D3A268AE for ; Tue, 9 Jan 2018 23:29:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B3C126E03F; Tue, 9 Jan 2018 23:29:19 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9DFA36E03F for ; Tue, 9 Jan 2018 23:29:18 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jan 2018 15:29:18 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,337,1511856000"; d="scan'208";a="22754104" Received: from przanoni-mobl.amr.corp.intel.com ([10.254.54.160]) by orsmga001.jf.intel.com with ESMTP; 09 Jan 2018 15:29:16 -0800 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 9 Jan 2018 21:28:31 -0200 Message-Id: <20180109232835.11478-14-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180109232835.11478-1-paulo.r.zanoni@intel.com> References: <20180109232336.11029-1-paulo.r.zanoni@intel.com> <20180109232835.11478-1-paulo.r.zanoni@intel.com> Subject: [Intel-gfx] [PATCH 23/27] drm/i915/icl: Split out the servicing of the Selector and Shared IIR registers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Oscar Mateo Both for clarity and so that we can reuse it later on. v2: - local_clock returns a u64 (Tvrtko) - Use the funky BIT(bit) version (Tvrtko) - wait_start not required (Tvrtko) - Use time_after64 (Oscar) Cc: Tvrtko Ursulin Cc: Daniele Ceraolo Spurio Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_irq.c | 58 +++++++++++++++++++++++++---------------- 1 file changed, 35 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 49fb8d60f770..c5bc0e8ae071 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -243,6 +243,37 @@ void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv, spin_unlock_irq(&dev_priv->irq_lock); } +static u16 gen11_service_shared_iir(struct drm_i915_private *dev_priv, + unsigned int bank, + unsigned int bit) +{ + u64 wait_end; + u16 irq; + u32 ident; + + I915_WRITE_FW(GEN11_IIR_REG_SELECTOR(bank), BIT(bit)); + /* + * NB: Specs do not specify how long to spin wait. + * Taking 100us as an educated guess + */ + wait_end = (local_clock() >> 10) + 100; + do { + ident = I915_READ_FW(GEN11_INTR_IDENTITY_REG(bank)); + } while (!(ident & GEN11_INTR_DATA_VALID) && + !time_after64(local_clock() >> 10, wait_end)); + + if (!(ident & GEN11_INTR_DATA_VALID)) + DRM_ERROR("INTR_IDENTITY_REG%u:%u timed out!\n", bank, bit); + + irq = ident & GEN11_INTR_ENGINE_MASK; + if (!irq) + DRM_ERROR("INTR_IDENTITY_REG%u:%u blank!\n", bank, bit); + + I915_WRITE_FW(GEN11_INTR_IDENTITY_REG(bank), ident); + + return irq; +} + /** * ilk_update_display_irq - update DEIMR * @dev_priv: driver private @@ -2768,10 +2799,9 @@ gen11_gt_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) { irqreturn_t ret = IRQ_NONE; u16 irq[2][32]; - u32 dw, ident; + u32 dw; unsigned long tmp; unsigned int bank, bit, engine; - unsigned long wait_start, wait_end; memset(irq, 0, sizeof(irq)); @@ -2781,27 +2811,9 @@ gen11_gt_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) if (!dw) DRM_ERROR("GT_INTR_DW%u blank!\n", bank); tmp = dw; - for_each_set_bit(bit, &tmp, 32) { - I915_WRITE_FW(GEN11_IIR_REG_SELECTOR(bank), 1 << bit); - wait_start = local_clock() >> 10; - /* NB: Specs do not specify how long to spin wait. - * Taking 100us as an educated guess */ - wait_end = wait_start + 100; - do { - ident = I915_READ_FW(GEN11_INTR_IDENTITY_REG(bank)); - } while (!(ident & GEN11_INTR_DATA_VALID) && - !time_after((unsigned long)local_clock() >> 10, wait_end)); - - if (!(ident & GEN11_INTR_DATA_VALID)) - DRM_ERROR("INTR_IDENTITY_REG%u:%u timed out!\n", - bank, bit); - - irq[bank][bit] = ident & GEN11_INTR_ENGINE_MASK; - if (!irq[bank][bit]) - DRM_ERROR("INTR_IDENTITY_REG%u:%u blank!\n", - bank, bit); - I915_WRITE_FW(GEN11_INTR_IDENTITY_REG(bank), ident); - } + for_each_set_bit(bit, &tmp, 32) + irq[bank][bit] = + gen11_service_shared_iir(dev_priv, bank, bit); I915_WRITE_FW(GEN11_GT_INTR_DW(bank), dw); } }