From patchwork Tue Jan 16 16:07:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lionel Landwerlin X-Patchwork-Id: 10167555 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E7857603B5 for ; Tue, 16 Jan 2018 16:07:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D67B028543 for ; Tue, 16 Jan 2018 16:07:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CB53E28755; Tue, 16 Jan 2018 16:07:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 41AEF28543 for ; Tue, 16 Jan 2018 16:07:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B95B26E238; Tue, 16 Jan 2018 16:07:35 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id BD8C56E238 for ; Tue, 16 Jan 2018 16:07:34 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Jan 2018 08:07:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,369,1511856000"; d="scan'208";a="10995179" Received: from delly.ld.intel.com ([10.103.238.204]) by orsmga006.jf.intel.com with ESMTP; 16 Jan 2018 08:07:33 -0800 From: Lionel Landwerlin To: intel-gfx@lists.freedesktop.org Date: Tue, 16 Jan 2018 16:07:28 +0000 Message-Id: <20180116160728.24747-2-lionel.g.landwerlin@intel.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180116160728.24747-1-lionel.g.landwerlin@intel.com> References: <20180116160728.24747-1-lionel.g.landwerlin@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 2/2] tests: add i915 query tests X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Lionel Landwerlin --- tests/Makefile.sources | 1 + tests/meson.build | 1 + tests/query.c | 268 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 270 insertions(+) create mode 100644 tests/query.c diff --git a/tests/Makefile.sources b/tests/Makefile.sources index e4e06d01..390cc82b 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -227,6 +227,7 @@ TESTS_progs = \ prime_self_import \ prime_udl \ prime_vgem \ + query \ sw_sync \ syncobj_basic \ syncobj_wait \ diff --git a/tests/meson.build b/tests/meson.build index 4c4bee1d..70df38f3 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -204,6 +204,7 @@ test_progs = [ 'prime_self_import', 'prime_udl', 'prime_vgem', + 'query', 'sw_sync', 'syncobj_basic', 'syncobj_wait', diff --git a/tests/query.c b/tests/query.c new file mode 100644 index 00000000..cb5aedd4 --- /dev/null +++ b/tests/query.c @@ -0,0 +1,268 @@ +/* + * Copyright © 2017 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "igt.h" + +IGT_TEST_DESCRIPTION("Testing the query uAPI."); + +static bool has_query_supports(int fd) +{ + struct drm_i915_query query = {}; + + return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0; +} + +static void test_query_garbage(int fd) +{ + struct drm_i915_query query; + struct drm_i915_query_item items[2]; + + memset(&query, 0, sizeof(query)); + query.num_items = 1; + query.items_ptr = 0xffffffff; + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT); + + memset(&query, 0, sizeof(query)); + query.num_items = 1; + query.items_ptr = 0; + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT); + + memset(&query, 0, sizeof(query)); + query.num_items = 2; + query.items_ptr = (uintptr_t) items; + memset(items, 0, sizeof(items)); + items[0].query_id = 0xffffffff; + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL); + + memset(&query, 0, sizeof(query)); + query.num_items = 2; + query.items_ptr = (uintptr_t) items; + memset(items, 0, sizeof(items)); + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL); + + memset(&query, 0, sizeof(query)); + query.num_items = 2; + query.items_ptr = (uintptr_t) items; + memset(items, 0, sizeof(items)); + items[0].query_id = DRM_I915_QUERY_SLICE_INFO; + items[0].length = 0xffffffff; + items[1].query_id = DRM_I915_QUERY_SUBSLICE_INFO; + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL); +} + +static bool query_topology_supported(int fd) +{ + struct drm_i915_query query; + struct drm_i915_query_item item; + + memset(&query, 0, sizeof(query)); + query.num_items = 1; + query.items_ptr = (uintptr_t) &item; + + memset(&item, 0, sizeof(item)); + item.query_id = DRM_I915_QUERY_SLICE_INFO; + + return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0; +} + +static void test_query_topology_pre_gen8(int fd) +{ + struct drm_i915_query query; + struct drm_i915_query_item item; + + memset(&query, 0, sizeof(query)); + query.num_items = 1; + query.items_ptr = (uintptr_t) &item; + + memset(&item, 0, sizeof(item)); + item.query_id = DRM_I915_QUERY_SLICE_INFO; + + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, ENODEV); +} + +static void +test_query_topology_coherent_slice_mask(int fd) +{ + struct drm_i915_query query; + struct drm_i915_query_item item; + struct drm_i915_query_slice_info *slices_info; + struct drm_i915_query_subslice_info *subslices_info; + drm_i915_getparam_t gp; + int slice_mask, subslice_mask; + int i, topology_slices, topology_subslices_slice0; + + gp.param = I915_PARAM_SLICE_MASK; + gp.value = &slice_mask; + do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); + + gp.param = I915_PARAM_SUBSLICE_MASK; + gp.value = &subslice_mask; + do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); + + igt_debug("slice_mask=0x%x subslice_mask=0x%x\n", slice_mask, subslice_mask); + + /* Slices */ + memset(&query, 0, sizeof(query)); + query.num_items = 1; + query.items_ptr = (uintptr_t) &item; + memset(&item, 0, sizeof(item)); + item.query_id = DRM_I915_QUERY_SLICE_INFO; + do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query); + + slices_info = (struct drm_i915_query_slice_info *) calloc(1, item.length); + + item.data_ptr = (uintptr_t) slices_info; + do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query); + + topology_slices = 0; + for (i = 0; i < slices_info->max_slices; i++) { + if (DRM_I915_QUERY_SLICE_AVAILABLE(slices_info, i)) + topology_slices++; + } + + /* These 2 should always match. */ + igt_assert(__builtin_popcount(slice_mask) == topology_slices); + + free(slices_info); + + /* Subslices */ + memset(&query, 0, sizeof(query)); + query.num_items = 1; + query.items_ptr = (uintptr_t) &item; + memset(&item, 0, sizeof(item)); + item.query_id = DRM_I915_QUERY_SUBSLICE_INFO; + do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query); + + subslices_info = (struct drm_i915_query_subslice_info *) calloc(1, item.length); + + item.data_ptr = (uintptr_t) subslices_info; + do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query); + + topology_subslices_slice0 = 0; + for (i = 0; i < subslices_info->max_subslices; i++) { + topology_subslices_slice0 += + __builtin_popcount( + DRM_I915_QUERY_SUBSLICE_AVAILABLE(subslices_info, 0, i)); + } + + /* I915_PARAM_SUBSLICE_INFO returns the value for slice0, we + * should match the values for the first slice of the + * topology. + */ + igt_assert(__builtin_popcount(subslice_mask) == topology_subslices_slice0); + + free(subslices_info); +} + +static void +test_query_topology_matches_eu_total(int fd) +{ + struct drm_i915_query query; + struct drm_i915_query_item item; + struct drm_i915_query_eu_info *eus_info; + drm_i915_getparam_t gp; + int n_eus, n_eus_topology, s; + + gp.param = I915_PARAM_EU_TOTAL; + gp.value = &n_eus; + do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); + igt_debug("n_eus=%i\n", n_eus); + + memset(&query, 0, sizeof(query)); + query.num_items = 1; + query.items_ptr = (uintptr_t) &item; + memset(&item, 0, sizeof(item)); + item.query_id = DRM_I915_QUERY_EU_INFO; + do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query); + + eus_info = (struct drm_i915_query_eu_info *) calloc(1, item.length); + + item.data_ptr = (uintptr_t) eus_info; + do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query); + + igt_debug("max_slices=%u max_subslices=%u max_eus_per_subslice=%u\n", + eus_info->max_slices, eus_info->max_subslices, + eus_info->max_eus_per_subslice); + + n_eus_topology = 0; + for (s = 0; s < eus_info->max_slices; s++) { + int ss; + + igt_debug("slice%i:\n", s); + + for (ss = 0; ss < eus_info->max_subslices; ss++) { + int eu, n_subslice_eus = 0; + + igt_debug("\tsubslice: %i\n", ss); + + igt_debug("\t\teu_mask: 0b"); + for (eu = 0; eu < eus_info->max_eus_per_subslice; eu++) { + uint8_t val = DRM_I915_QUERY_EU_AVAILABLE(eus_info, s, ss, + eus_info->max_eus_per_subslice - 1 - eu); + igt_debug("%hhi", val); + n_subslice_eus += __builtin_popcount(val); + n_eus_topology += __builtin_popcount(val); + } + igt_debug(" (%i)\n", n_subslice_eus); + } + } + + igt_assert(n_eus_topology == n_eus); +} + +igt_main +{ + int fd = -1; + int devid; + + igt_fixture { + fd = drm_open_driver(DRIVER_INTEL); + igt_require(has_query_supports(fd)); + devid = intel_get_drm_devid(fd); + } + + igt_subtest("query-garbage") + test_query_garbage(fd); + + igt_subtest("query-topology-pre-gen8") { + igt_require(intel_gen(devid) < 8); + igt_require(query_topology_supported(fd)); + test_query_topology_pre_gen8(fd); + } + + igt_subtest("query-topology-coherent-slice-mask") { + igt_require(AT_LEAST_GEN(devid, 8)); + igt_require(query_topology_supported(fd)); + test_query_topology_coherent_slice_mask(fd); + } + + igt_subtest("query-topology-matches-eu-total") { + igt_require(AT_LEAST_GEN(devid, 8)); + igt_require(query_topology_supported(fd)); + test_query_topology_matches_eu_total(fd); + } + + igt_fixture { + close(fd); + } +}