From patchwork Fri Feb 16 23:25:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 10225893 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7DFB5602CB for ; Fri, 16 Feb 2018 23:27:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 614E029426 for ; Fri, 16 Feb 2018 23:27:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5512F296A4; Fri, 16 Feb 2018 23:27:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C21F529426 for ; Fri, 16 Feb 2018 23:26:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE5CF6E058; Fri, 16 Feb 2018 23:26:58 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 156836E058 for ; Fri, 16 Feb 2018 23:26:56 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Feb 2018 15:26:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,522,1511856000"; d="scan'208";a="18778955" Received: from dk-thinkpad-x260.jf.intel.com (HELO dk-ThinkPad-X260.fios-router.home) ([10.54.75.38]) by orsmga008.jf.intel.com with ESMTP; 16 Feb 2018 15:26:56 -0800 From: Dhinakaran Pandiyan To: intel-gfx@lists.freedesktop.org Date: Fri, 16 Feb 2018 15:25:55 -0800 Message-Id: <20180216232555.23563-1-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.14.1 Subject: [Intel-gfx] [CI] drm/i915/cnl: New power domain for AUX IO. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dhinakaran Pandiyan MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP PSR requires AUX IO well to be kept on and the existing AUX domain enables other wells too. Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_display.h | 5 +++++ drivers/gpu/drm/i915/intel_dp.c | 6 ++++++ drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_psr.c | 4 ++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++ 5 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h index c4042e342f50..9857b60a7e0f 100644 --- a/drivers/gpu/drm/i915/intel_display.h +++ b/drivers/gpu/drm/i915/intel_display.h @@ -175,6 +175,11 @@ enum intel_display_power_domain { POWER_DOMAIN_AUX_C, POWER_DOMAIN_AUX_D, POWER_DOMAIN_AUX_F, + POWER_DOMAIN_AUX_IO_A, + POWER_DOMAIN_AUX_IO_B, + POWER_DOMAIN_AUX_IO_C, + POWER_DOMAIN_AUX_IO_D, + POWER_DOMAIN_AUX_IO_F, POWER_DOMAIN_GMBUS, POWER_DOMAIN_MODESET, POWER_DOMAIN_GT_IRQ, diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index f20b25f98e5a..aa90f6a70689 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -6280,22 +6280,28 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port) switch (encoder->port) { case PORT_A: intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A; + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_A; break; case PORT_B: intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B; + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_B; break; case PORT_C: intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C; + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_C; break; case PORT_D: intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D; + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D; break; case PORT_E: /* FIXME: Check VBT for actual wiring of PORT E */ intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D; + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_D; break; case PORT_F: intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F; + intel_dp->aux_io_power_domain = POWER_DOMAIN_AUX_IO_F; break; default: MISSING_CASE(encoder->port); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 898064e8bea7..c7c4180e41d8 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1071,6 +1071,7 @@ struct intel_dp { struct drm_dp_desc desc; struct drm_dp_aux aux; enum intel_display_power_domain aux_power_domain; + enum intel_display_power_domain aux_io_power_domain; uint8_t train_set[4]; int panel_power_up_delay; int panel_power_down_delay; diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 2ef374f936b9..62de8f0632b0 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -484,6 +484,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp, EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); } + + intel_display_power_get(dev_priv, intel_dp->aux_io_power_domain); } /** @@ -617,6 +619,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp, else WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); } + + intel_display_power_put(dev_priv, intel_dp->aux_io_power_domain); } /** diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 16790f2576ec..323c1babb0a0 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -130,6 +130,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain) return "AUX_D"; case POWER_DOMAIN_AUX_F: return "AUX_F"; + case POWER_DOMAIN_AUX_IO_A: + return "AUX_IO_A"; + case POWER_DOMAIN_AUX_IO_B: + return "AUX_IO_B"; + case POWER_DOMAIN_AUX_IO_C: + return "AUX_IO_C"; + case POWER_DOMAIN_AUX_IO_D: + return "AUX_IO_D"; + case POWER_DOMAIN_AUX_IO_F: + return "AUX_IO_F"; case POWER_DOMAIN_GMBUS: return "GMBUS"; case POWER_DOMAIN_INIT: @@ -1853,18 +1863,23 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_A) | \ + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_B) | \ + BIT_ULL(POWER_DOMAIN_AUX_IO_B) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_AUX_C_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_C) | \ + BIT_ULL(POWER_DOMAIN_AUX_IO_C) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_AUX_D_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_D) | \ + BIT_ULL(POWER_DOMAIN_AUX_IO_D) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_F) | \ + BIT_ULL(POWER_DOMAIN_AUX_IO_F) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \