From patchwork Wed Mar 21 14:29:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 10299517 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0972E602B3 for ; Wed, 21 Mar 2018 14:29:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EF148297CC for ; Wed, 21 Mar 2018 14:29:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E3B6529819; Wed, 21 Mar 2018 14:29:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 16D19297CC for ; Wed, 21 Mar 2018 14:29:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B98F6E95C; Wed, 21 Mar 2018 14:29:12 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8FB956E3E2 for ; Wed, 21 Mar 2018 14:29:09 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Mar 2018 07:29:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,340,1517904000"; d="scan'208";a="39939494" Received: from jnikula-mobl2.fi.intel.com (HELO localhost) ([10.237.72.62]) by fmsmga001.fm.intel.com with ESMTP; 21 Mar 2018 07:29:07 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Wed, 21 Mar 2018 16:29:58 +0200 Message-Id: <20180321142958.31107-2-jani.nikula@intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180321142958.31107-1-jani.nikula@intel.com> References: <20180321142958.31107-1-jani.nikula@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v2 2/2] drm/i915: hint gen and gen_mask shouldn't be used directly X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Prefix gen and gen_mask in struct intel_device_info with underscores to hint that they should not be used directly, except in special circumstances. v2: Rebase Cc: Tvrtko Ursulin Cc: Chris Wilson Signed-off-by: Jani Nikula Acked-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.c | 5 +++-- drivers/gpu/drm/i915/i915_drv.h | 24 ++++++++++++------------ drivers/gpu/drm/i915/i915_pci.c | 2 +- drivers/gpu/drm/i915/intel_device_info.c | 2 +- drivers/gpu/drm/i915/intel_device_info.h | 6 ++++-- drivers/gpu/drm/i915/intel_uncore.c | 2 +- 6 files changed, 22 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 3f637ab89e51..56c367bed573 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -907,7 +907,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv, BUILD_BUG_ON(INTEL_MAX_PLATFORMS > sizeof(device_info->platform_mask) * BITS_PER_BYTE); - BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE); + BUG_ON(device_info->__gen > + sizeof(device_info->__gen_mask) * BITS_PER_BYTE); spin_lock_init(&dev_priv->irq_lock); spin_lock_init(&dev_priv->gpu_error.lock); mutex_init(&dev_priv->backlight_lock); @@ -1339,7 +1340,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) int ret; /* Enable nuclear pageflip on ILK+ */ - if (!i915_modparams.nuclear_pageflip && match_info->gen < 5) + if (!i915_modparams.nuclear_pageflip && match_info->__gen < 5) driver.driver_features &= ~DRIVER_ATOMIC; ret = -ENOMEM; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index c9c3b2ba6a86..f4a13951916c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2294,7 +2294,7 @@ intel_info(const struct drm_i915_private *dev_priv) #define INTEL_INFO(dev_priv) intel_info((dev_priv)) -#define INTEL_GEN(dev_priv) ((dev_priv)->info.gen) +#define INTEL_GEN(dev_priv) ((dev_priv)->info.__gen) #define INTEL_DEVID(dev_priv) ((dev_priv)->info.device_id) #define REVID_FOREVER 0xff @@ -2315,7 +2315,7 @@ intel_info(const struct drm_i915_private *dev_priv) * Use GEN_FOREVER for unbound start and or end. */ #define IS_GEN(dev_priv, s, e) \ - (!!((dev_priv)->info.gen_mask & INTEL_GEN_MASK((s), (e)))) + (!!((dev_priv)->info.__gen_mask & INTEL_GEN_MASK((s), (e)))) /* * Return true if revision is in range [since,until] inclusive. @@ -2463,16 +2463,16 @@ intel_info(const struct drm_i915_private *dev_priv) * have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular * chips, etc.). */ -#define IS_GEN2(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(1))) -#define IS_GEN3(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(2))) -#define IS_GEN4(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(3))) -#define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4))) -#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5))) -#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6))) -#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7))) -#define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8))) -#define IS_GEN10(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(9))) -#define IS_GEN11(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(10))) +#define IS_GEN2(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(1))) +#define IS_GEN3(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(2))) +#define IS_GEN4(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(3))) +#define IS_GEN5(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(4))) +#define IS_GEN6(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(5))) +#define IS_GEN7(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(6))) +#define IS_GEN8(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(7))) +#define IS_GEN9(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(8))) +#define IS_GEN10(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(9))) +#define IS_GEN11(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(10))) #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp) #define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv)) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 4364922e935d..e6ea0ed6f1bd 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -30,7 +30,7 @@ #include "i915_selftest.h" #define PLATFORM(x) .platform = (x), .platform_mask = BIT(x) -#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1) +#define GEN(x) .__gen = (x), .__gen_mask = BIT((x) - 1) #define GEN_DEFAULT_PIPEOFFSETS \ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \ diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 477cb71b5864..76395fd9ef0d 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -119,7 +119,7 @@ void intel_device_info_dump(const struct intel_device_info *info, INTEL_DEVID(dev_priv), INTEL_REVID(dev_priv), intel_platform_name(info->platform), - info->gen); + info->__gen); intel_device_info_dump_flags(info, p); } diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 933e31669557..f488118c2eef 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -144,9 +144,11 @@ typedef u8 intel_ring_mask_t; struct intel_device_info { u16 device_id; - u16 gen_mask; - u8 gen; + /* Prefer INTEL_GEN() and IS_GENx() over accessing these. */ + u16 __gen_mask; + u8 __gen; + u8 gt; /* GT number, 0 if undefined */ u8 num_rings; intel_ring_mask_t ring_mask; /* Rings supported by the HW */ diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 4c616d074a97..08c9648a1e9b 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1664,7 +1664,7 @@ int i915_reg_read_ioctl(struct drm_device *dev, GEM_BUG_ON(entry->size > 8); GEM_BUG_ON(entry_offset & (entry->size - 1)); - if (INTEL_INFO(dev_priv)->gen_mask & entry->gen_mask && + if (INTEL_INFO(dev_priv)->__gen_mask & entry->gen_mask && entry_offset == (reg->offset & -entry->size)) break; entry++;