From patchwork Thu Mar 22 11:23:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10301263 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 496B760385 for ; Thu, 22 Mar 2018 11:24:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3B36829B41 for ; Thu, 22 Mar 2018 11:24:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2F46329B43; Thu, 22 Mar 2018 11:24:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BB46729B41 for ; Thu, 22 Mar 2018 11:24:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3EA8A6E731; Thu, 22 Mar 2018 11:24:06 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id D51816E731 for ; Thu, 22 Mar 2018 11:24:04 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id x82so15352337wmg.1 for ; Thu, 22 Mar 2018 04:24:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vpNaTIWKo37Hlx1WQh5Up2ZNOasON/x+dUKzFCFjbFA=; b=HY1FGNmJafPNFbDDi3eiV/6tAf380n1GpBK3GQkoZm1umG3x9ozmXlJKQOoMJgil/M 8Y8U+p2UBhNIblxz6R+axAkpSYgzI2zf9IKw8kCbbq0a0ZhhwEgLYxax+XZ/+K2WOu1y rUbKqatjKcCj7lf1NHj5g0t8WqCkwgysUbhDGqNA9Lj9uyeCm8PziZsSzP4UI002z5mf SWiUsItZ3f78iqW2nrfL9dFi2NolKrz9Vbl8ZkSlLZdHq8UxYEoDzaMdXAMJ+qBcIjAw 74eYceryUFBHeFGPrwtG52Ep7g1o08vCEQuuXqgLL29KTdnTeuKg3JAgeLlDqaH3GHPC 0z8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vpNaTIWKo37Hlx1WQh5Up2ZNOasON/x+dUKzFCFjbFA=; b=lq7k9HjHLdOLWco1hKLfwJ8vrvC5nUw8BjO86qfZ6u5e3U+/ORAmFcBnkpaBSSFtUu kADrjLjl2aPASkwCoZA/QvQcbrbt/+2UDb1wbYvQoR7MOkzK03AKCVl8tNFmTSy858m2 2UnlT6j6MxamvLNd99L6n5J7rcRTvP3hwl0H6J3AO+m04z7e4AgizB/75KtHPCqmmqyb 5LsUe4oQ5BmTyvo8s9W8aOQVCi8GJ62kpkEI39QasF12iF8RhEltBRkRrRTU1WEkOC9t bqVIzu4aC2QsrfULRwlNk+3349+BOfLfHUmNAPbQtKkFCR8qZ+KDif2KPKfDlXifJRGx HLLQ== X-Gm-Message-State: AElRT7Ehj9t53XlP3FHlyolH6FFFcKYjOY9DWzPt2IQlJal94hYXjvGG xFuKFFVO+Z4i5+HnL65w99Pesw== X-Google-Smtp-Source: AG47ELvQ5IIZsTaw9uhwt++l1dPEodh3jWHyIdJqJWioeFQIqs/FJNT/jtFwxj+gRDbjD54TSRtmsA== X-Received: by 10.28.22.210 with SMTP id 201mr4971671wmw.66.1521717843394; Thu, 22 Mar 2018 04:24:03 -0700 (PDT) Received: from localhost.localdomain ([95.146.144.186]) by smtp.gmail.com with ESMTPSA id c57sm3107609wrg.84.2018.03.22.04.24.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 22 Mar 2018 04:24:02 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org Date: Thu, 22 Mar 2018 11:23:52 +0000 Message-Id: <20180322112352.9348-1-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: References: Subject: [Intel-gfx] [PATCH i-g-t v2 2/3] tests/gem_eio: Speed up test execution X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-gfx@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin If we stop relying on regular GPU hangs to be detected, but trigger them manually as soon as we know our batch of interest is actually executing on the GPU, we can dramatically speed up various subtests. This is enabled by the pollable spin batch added in the previous patch. Signed-off-by: Tvrtko Ursulin Suggested-by: Chris Wilson Cc: Antonio Argenziano --- Note that the 'wait' subtest is mysteriously hanging for me in the no-op batch send by gem_test_engines, but only on RCS engine. TBD while I am getting some CI results. --- tests/gem_eio.c | 97 +++++++++++++++++++++++++++++++++++++++++---------------- 1 file changed, 70 insertions(+), 27 deletions(-) diff --git a/tests/gem_eio.c b/tests/gem_eio.c index 4bcc5937db39..93400056124b 100644 --- a/tests/gem_eio.c +++ b/tests/gem_eio.c @@ -71,26 +71,23 @@ static void trigger_reset(int fd) gem_quiescent_gpu(fd); } -static void wedge_gpu(int fd) +static void manual_hang(int drm_fd) { - /* First idle the GPU then disable GPU resets before injecting a hang */ - gem_quiescent_gpu(fd); - - igt_require(i915_reset_control(false)); + int dir = igt_debugfs_dir(drm_fd); - igt_debug("Wedging GPU by injecting hang\n"); - igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT)); + igt_sysfs_set(dir, "i915_wedged", "-1"); - igt_assert(i915_reset_control(true)); + close(dir); } -static void wedgeme(int drm_fd) +static void wedge_gpu(int fd) { - int dir = igt_debugfs_dir(drm_fd); - - igt_sysfs_set(dir, "i915_wedged", "-1"); + /* First idle the GPU then disable GPU resets before injecting a hang */ + gem_quiescent_gpu(fd); - close(dir); + igt_require(i915_reset_control(false)); + manual_hang(fd); + igt_assert(i915_reset_control(true)); } static int __gem_throttle(int fd) @@ -149,29 +146,66 @@ static int __gem_wait(int fd, uint32_t handle, int64_t timeout) return err; } +static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags) +{ + if (gem_can_store_dword(fd, flags)) + return __igt_spin_batch_new_poll(fd, ctx, flags); + else + return __igt_spin_batch_new(fd, ctx, flags, 0); +} + +static void __spin_wait(int fd, igt_spin_t *spin) +{ + if (spin->running) { + while (!*((volatile bool *)spin->running)) + ; + } else { + igt_debug("__spin_wait - usleep mode\n"); + usleep(500e3); /* Better than nothing! */ + } +} + +/* + * Wedge the GPU when we know our batch is running. + */ +static void wedge_after_running(int fd, igt_spin_t *spin) +{ + __spin_wait(fd, spin); + manual_hang(fd); +} + static void test_wait(int fd) { - igt_hang_t hang; + struct timespec ts = { }; + igt_spin_t *hang; igt_require_gem(fd); + igt_nsec_elapsed(&ts); + /* If the request we wait on completes due to a hang (even for * that request), the user expects the return value to 0 (success). */ - hang = igt_hang_ring(fd, I915_EXEC_DEFAULT); - igt_assert_eq(__gem_wait(fd, hang.handle, -1), 0); - igt_post_hang_ring(fd, hang); + igt_require(i915_reset_control(true)); + hang = __spin_poll(fd, 0, I915_EXEC_DEFAULT); + wedge_after_running(fd, hang); + igt_assert_eq(__gem_wait(fd, hang->handle, -1), 0); + igt_spin_batch_free(fd, hang); /* If the GPU is wedged during the wait, again we expect the return * value to be 0 (success). */ igt_require(i915_reset_control(false)); - hang = igt_hang_ring(fd, I915_EXEC_DEFAULT); - igt_assert_eq(__gem_wait(fd, hang.handle, -1), 0); - igt_post_hang_ring(fd, hang); + hang = __spin_poll(fd, 0, I915_EXEC_DEFAULT); + wedge_after_running(fd, hang); + igt_assert_eq(__gem_wait(fd, hang->handle, -1), 0); + igt_spin_batch_free(fd, hang); igt_require(i915_reset_control(true)); trigger_reset(fd); + + /* HACK for CI */ + igt_assert(igt_nsec_elapsed(&ts) < 5e9); } static void test_suspend(int fd, int state) @@ -181,7 +215,7 @@ static void test_suspend(int fd, int state) /* Check we can suspend when the driver is already wedged */ igt_require(i915_reset_control(false)); - wedgeme(fd); + manual_hang(fd); igt_system_suspend_autoresume(state, SUSPEND_TEST_DEVICES); @@ -209,11 +243,10 @@ static void test_inflight(int fd) int fence[64]; /* conservative estimate of ring size */ gem_quiescent_gpu(fd); - igt_debug("Starting %s on engine '%s'\n", __func__, e__->name); igt_require(i915_reset_control(false)); - hang = __igt_spin_batch_new(fd, 0, engine, 0); + hang = __spin_poll(fd, 0, engine); obj[0].handle = hang->handle; memset(&execbuf, 0, sizeof(execbuf)); @@ -227,6 +260,8 @@ static void test_inflight(int fd) igt_assert(fence[n] != -1); } + wedge_after_running(fd, hang); + igt_assert_eq(__gem_wait(fd, obj[1].handle, -1), 0); for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) { igt_assert_eq(sync_fence_status(fence[n]), -EIO); @@ -256,7 +291,7 @@ static void test_inflight_suspend(int fd) obj[1].handle = gem_create(fd, 4096); gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); - hang = __igt_spin_batch_new(fd, 0, 0, 0); + hang = __spin_poll(fd, 0, 0); obj[0].handle = hang->handle; memset(&execbuf, 0, sizeof(execbuf)); @@ -273,6 +308,8 @@ static void test_inflight_suspend(int fd) igt_set_autoresume_delay(30); igt_system_suspend_autoresume(SUSPEND_STATE_MEM, SUSPEND_TEST_NONE); + wedge_after_running(fd, hang); + igt_assert_eq(__gem_wait(fd, obj[1].handle, -1), 0); for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) { igt_assert_eq(sync_fence_status(fence[n]), -EIO); @@ -330,7 +367,7 @@ static void test_inflight_contexts(int fd) igt_debug("Starting %s on engine '%s'\n", __func__, e__->name); igt_require(i915_reset_control(false)); - hang = __igt_spin_batch_new(fd, 0, engine, 0); + hang = __spin_poll(fd, ctx[0], engine); obj[0].handle = hang->handle; memset(&execbuf, 0, sizeof(execbuf)); @@ -345,6 +382,8 @@ static void test_inflight_contexts(int fd) igt_assert(fence[n] != -1); } + wedge_after_running(fd, hang); + igt_assert_eq(__gem_wait(fd, obj[1].handle, -1), 0); for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) { igt_assert_eq(sync_fence_status(fence[n]), -EIO); @@ -375,7 +414,7 @@ static void test_inflight_external(int fd) fence = igt_cork_plug(&cork, fd); igt_require(i915_reset_control(false)); - hang = __igt_spin_batch_new(fd, 0, 0, 0); + hang = __spin_poll(fd, 0, 0); memset(&obj, 0, sizeof(obj)); obj.handle = gem_create(fd, 4096); @@ -393,6 +432,8 @@ static void test_inflight_external(int fd) fence = execbuf.rsvd2 >> 32; igt_assert(fence != -1); + wedge_after_running(fd, hang); + gem_sync(fd, hang->handle); /* wedged, with an unready batch */ igt_assert(!gem_bo_busy(fd, hang->handle)); igt_assert(gem_bo_busy(fd, obj.handle)); @@ -420,7 +461,7 @@ static void test_inflight_internal(int fd) igt_require(gem_has_exec_fence(fd)); igt_require(i915_reset_control(false)); - hang = __igt_spin_batch_new(fd, 0, 0, 0); + hang = __spin_poll(fd, 0, 0); memset(obj, 0, sizeof(obj)); obj[0].handle = hang->handle; @@ -441,6 +482,8 @@ static void test_inflight_internal(int fd) nfence++; } + wedge_after_running(fd, hang); + igt_assert_eq(__gem_wait(fd, obj[1].handle, -1), 0); while (nfence--) { igt_assert_eq(sync_fence_status(fences[nfence]), -EIO);