From patchwork Thu Mar 22 13:22:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 10301539 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7D64560385 for ; Thu, 22 Mar 2018 13:22:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6CF00228C8 for ; Thu, 22 Mar 2018 13:22:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6135122A65; Thu, 22 Mar 2018 13:22:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C1078228C8 for ; Thu, 22 Mar 2018 13:22:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 10BB06EC0A; Thu, 22 Mar 2018 13:22:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5B8446EC0A for ; Thu, 22 Mar 2018 13:22:31 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Mar 2018 06:22:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,345,1517904000"; d="scan'208";a="41247497" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga001.jf.intel.com with SMTP; 22 Mar 2018 06:22:28 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 22 Mar 2018 15:22:27 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Mar 2018 15:22:27 +0200 Message-Id: <20180322132227.23810-1-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.16.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä When we're disabling the HDMI link we try to reset the scrambling and TMDS bit clock ratio back to the default values. This will fail if the sink has already been disconnected. Thus we should not print an error message when resetting the scrambling/TMDS bit clock ratio fail during disable. During enable we do want the error, and during disable we may still want to know what happended for debug purposes so let's use DRM_DEBUG_KMS() there. Cc: Shashank Sharma Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105644 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105655 Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 11 ++-- drivers/gpu/drm/i915/intel_drv.h | 10 ++-- drivers/gpu/drm/i915/intel_hdmi.c | 104 +++++++++++++++++++++++++------------- 3 files changed, 78 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 8c2d778560f0..e151c073debb 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2426,10 +2426,8 @@ static void intel_enable_ddi_hdmi(struct intel_encoder *encoder, struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); enum port port = encoder->port; - intel_hdmi_handle_sink_scrambling(encoder, - conn_state->connector, - crtc_state->hdmi_high_tmds_clock_ratio, - crtc_state->hdmi_scrambling); + intel_hdmi_sink_scrambling_enable(encoder, + crtc_state, conn_state); /* Display WA #1143: skl,kbl,cfl */ if (IS_GEN9_BC(dev_priv)) { @@ -2524,9 +2522,8 @@ static void intel_disable_ddi_hdmi(struct intel_encoder *encoder, intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state); - intel_hdmi_handle_sink_scrambling(encoder, - old_conn_state->connector, - false, false); + intel_hdmi_sink_scrambling_enable(encoder, + old_crtc_state, old_conn_state); } static void intel_disable_ddi(struct intel_encoder *encoder, diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index a215aa78b0be..90ea6e8e8f5b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1783,10 +1783,12 @@ struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); bool intel_hdmi_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state); -void intel_hdmi_handle_sink_scrambling(struct intel_encoder *intel_encoder, - struct drm_connector *connector, - bool high_tmds_clock_ratio, - bool scrambling); +void intel_hdmi_sink_scrambling_enable(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state); +void intel_hdmi_sink_scrambling_disable(struct intel_encoder *encoder, + struct intel_crtc_state *old_crtc_state, + struct drm_connector_state *old_conn_state); void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable); void intel_infoframe_init(struct intel_digital_port *intel_dig_port); diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 1baef4ac7ecb..a27da73147fd 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -2068,55 +2068,87 @@ intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *c connector->state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE; } -/* - * intel_hdmi_handle_sink_scrambling: handle sink scrambling/clock ratio setup - * @encoder: intel_encoder - * @connector: drm_connector - * @high_tmds_clock_ratio = bool to indicate if the function needs to set - * or reset the high tmds clock ratio for scrambling - * @scrambling: bool to Indicate if the function needs to set or reset - * sink scrambling - * - * This function handles scrambling on HDMI 2.0 capable sinks. - * If required clock rate is > 340 Mhz && scrambling is supported by sink - * it enables scrambling. This should be called before enabling the HDMI - * 2.0 port, as the sink can choose to disable the scrambling if it doesn't - * detect a scrambled clock within 100 ms. - */ -void intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder, - struct drm_connector *connector, - bool high_tmds_clock_ratio, - bool scrambling) +static int intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder, + struct drm_connector *connector, + bool high_tmds_clock_ratio, + bool scrambling) { + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); - struct drm_i915_private *dev_priv = connector->dev->dev_private; struct drm_scrambling *sink_scrambling = &connector->display_info.hdmi.scdc.scrambling; - struct i2c_adapter *adptr = intel_gmbus_get_adapter(dev_priv, - intel_hdmi->ddc_bus); + struct i2c_adapter *adapter = + intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus); bool ret; if (!sink_scrambling->supported) - return; + return 0; - DRM_DEBUG_KMS("Setting sink scrambling for enc:%s connector:%s\n", - encoder->base.name, connector->name); + DRM_DEBUG_KMS("[CONNECTOR:%d:%s] scrambling=%s, TMDS bit clock ratio=1/%dX\n", + connector->base.id, connector->name, + yesno(scrambling), high_tmds_clock_ratio ? 40 : 10); /* Set TMDS bit clock ratio to 1/40 or 1/10 */ - ret = drm_scdc_set_high_tmds_clock_ratio(adptr, high_tmds_clock_ratio); - if (!ret) { - DRM_ERROR("Set TMDS ratio failed\n"); - return; - } + ret = drm_scdc_set_high_tmds_clock_ratio(adapter, + high_tmds_clock_ratio); + if (ret) + return ret; /* Enable/disable sink scrambling */ - ret = drm_scdc_set_scrambling(adptr, scrambling); - if (!ret) { - DRM_ERROR("Set sink scrambling failed\n"); - return; - } + ret = drm_scdc_set_scrambling(adapter, scrambling); + if (ret) + return ret; + + return 0; +} - DRM_DEBUG_KMS("sink scrambling handled\n"); +/* + * intel_hdmi_sink_scrambling_enable: configure sink scrambling/TMDS bit clock ratio + * @crtc_state: new crtc state + * @conn_state: new connector state + * + * Configure scrambling and TMDS bit clock ratio on HDMI 2.0 capable sinks. + * If required clock rate is > 340 Mhz && scrambling is supported by sink + * it enables scrambling. This should be called before enabling the HDMI + * 2.0 port, as the sink can choose to disable the scrambling if it doesn't + * detect a scrambled clock within 100 ms. + */ +void intel_hdmi_sink_scrambling_enable(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct drm_connector *connector = conn_state->connector; + int ret; + + ret = intel_hdmi_handle_sink_scrambling(encoder, connector, + crtc_state->hdmi_high_tmds_clock_ratio, + crtc_state->hdmi_scrambling); + if (ret) + DRM_ERROR("[CONNECTOR:%d:%s] Failed to configure sink scrambling/TMDS bit clock ratio\n", + connector->base.id, connector->name); +} + +/* + * intel_hdmi_sink_scrambling_disable: handle sink scrambling/clock ratio setup during disable + * @old_crtc_state: old crtc state + * @old_conn_state: old connector state + * + * Reset scrambling and TMDS bit clock ratio on HDMI 2.0 capable sinks. + * We do this to make sure the sink returns to the default settings once + * we're done using it. + */ +void intel_hdmi_sink_scrambling_disable(struct intel_encoder *encoder, + struct intel_crtc_state *old_crtc_state, + struct drm_connector_state *old_conn_state) +{ + struct drm_connector *connector = old_conn_state->connector; + int ret; + + ret = intel_hdmi_handle_sink_scrambling(encoder, connector, + false, false); + if (ret) + DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Failed to reset sink scrambling/TMDS bit clock ratio\n", + connector->base.id, connector->name); } static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)