| Message ID | 20180323144728.61548-4-michal.wajdeczko@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote: > This is a preparation step for the upcoming patches. > We already can return some small data decoded from the command > status, but we will need more in the future. > > v2: add explicit response buf size > v3: squash with helper patch > > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Oscar Mateo <oscar.mateo@intel.com> > Cc: Michel Thierry <michel.thierry@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Reviewed-by: Michel Thierry <michel.thierry@intel.com> #1 r-b still applies to v3. > --- > drivers/gpu/drm/i915/intel_guc.c | 6 ++++-- > drivers/gpu/drm/i915/intel_guc.h | 18 ++++++++++++++---- > drivers/gpu/drm/i915/intel_guc_ct.c | 7 ++++--- > 3 files changed, 22 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c > index 77bf4e6..a533ff8 100644 > --- a/drivers/gpu/drm/i915/intel_guc.c > +++ b/drivers/gpu/drm/i915/intel_guc.c > @@ -310,7 +310,8 @@ void intel_guc_init_params(struct intel_guc *guc) > intel_uncore_forcewake_put(dev_priv, FORCEWAKE_BLITTER); > } > > -int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len) > +int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, > + u32 *response_buf, u32 response_buf_size) > { > WARN(1, "Unexpected send: action=%#x\n", *action); > return -ENODEV; > @@ -319,7 +320,8 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len) > /* > * This function implements the MMIO based host to GuC interface. > */ > -int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len) > +int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, > + u32 *response_buf, u32 response_buf_size) > { > struct drm_i915_private *dev_priv = guc_to_i915(guc); > u32 status; > diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h > index 13f3d1d..7ee0732 100644 > --- a/drivers/gpu/drm/i915/intel_guc.h > +++ b/drivers/gpu/drm/i915/intel_guc.h > @@ -88,7 +88,8 @@ struct intel_guc { > struct mutex send_mutex; > > /* GuC's FW specific send function */ > - int (*send)(struct intel_guc *guc, const u32 *data, u32 len); > + int (*send)(struct intel_guc *guc, const u32 *data, u32 len, > + u32 *response_buf, u32 response_buf_size); > > /* GuC's FW specific notify function */ > void (*notify)(struct intel_guc *guc); > @@ -97,7 +98,14 @@ struct intel_guc { > static > inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len) > { > - return guc->send(guc, action, len); > + return guc->send(guc, action, len, NULL, 0); > +} > + > +static inline int > +intel_guc_send_and_receive(struct intel_guc *guc, const u32 *action, u32 len, > + u32 *response_buf, u32 response_buf_size) > +{ > + return guc->send(guc, action, len, response_buf, response_buf_size); > } > > static inline void intel_guc_notify(struct intel_guc *guc) > @@ -140,8 +148,10 @@ static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc, > void intel_guc_fini_wq(struct intel_guc *guc); > int intel_guc_init(struct intel_guc *guc); > void intel_guc_fini(struct intel_guc *guc); > -int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len); > -int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len); > +int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, > + u32 *response_buf, u32 response_buf_size); > +int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, > + u32 *response_buf, u32 response_buf_size); > void intel_guc_to_host_event_handler(struct intel_guc *guc); > int intel_guc_sample_forcewake(struct intel_guc *guc); > int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset); > diff --git a/drivers/gpu/drm/i915/intel_guc_ct.c b/drivers/gpu/drm/i915/intel_guc_ct.c > index fa52259..a54bf58 100644 > --- a/drivers/gpu/drm/i915/intel_guc_ct.c > +++ b/drivers/gpu/drm/i915/intel_guc_ct.c > @@ -88,7 +88,7 @@ static int guc_action_register_ct_buffer(struct intel_guc *guc, > int err; > > /* Can't use generic send(), CT registration must go over MMIO */ > - err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action)); > + err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action), NULL, 0); > if (err) > DRM_ERROR("CT: register %s buffer failed; err=%d\n", > guc_ct_buffer_type_to_str(type), err); > @@ -107,7 +107,7 @@ static int guc_action_deregister_ct_buffer(struct intel_guc *guc, > int err; > > /* Can't use generic send(), CT deregistration must go over MMIO */ > - err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action)); > + err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action), NULL, 0); > if (err) > DRM_ERROR("CT: deregister %s buffer failed; owner=%d err=%d\n", > guc_ct_buffer_type_to_str(type), owner, err); > @@ -408,7 +408,8 @@ static int ctch_send(struct intel_guc *guc, > /* > * Command Transport (CT) buffer based GuC send function. > */ > -static int intel_guc_send_ct(struct intel_guc *guc, const u32 *action, u32 len) > +static int intel_guc_send_ct(struct intel_guc *guc, const u32 *action, u32 len, > + u32 *response_buf, u32 response_buf_size) > { > struct intel_guc_ct_channel *ctch = &guc->ct.host_channel; > u32 status = ~0; /* undefined */ >
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 77bf4e6..a533ff8 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -310,7 +310,8 @@ void intel_guc_init_params(struct intel_guc *guc) intel_uncore_forcewake_put(dev_priv, FORCEWAKE_BLITTER); } -int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len) +int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, + u32 *response_buf, u32 response_buf_size) { WARN(1, "Unexpected send: action=%#x\n", *action); return -ENODEV; @@ -319,7 +320,8 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len) /* * This function implements the MMIO based host to GuC interface. */ -int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len) +int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, + u32 *response_buf, u32 response_buf_size) { struct drm_i915_private *dev_priv = guc_to_i915(guc); u32 status; diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 13f3d1d..7ee0732 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -88,7 +88,8 @@ struct intel_guc { struct mutex send_mutex; /* GuC's FW specific send function */ - int (*send)(struct intel_guc *guc, const u32 *data, u32 len); + int (*send)(struct intel_guc *guc, const u32 *data, u32 len, + u32 *response_buf, u32 response_buf_size); /* GuC's FW specific notify function */ void (*notify)(struct intel_guc *guc); @@ -97,7 +98,14 @@ struct intel_guc { static inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len) { - return guc->send(guc, action, len); + return guc->send(guc, action, len, NULL, 0); +} + +static inline int +intel_guc_send_and_receive(struct intel_guc *guc, const u32 *action, u32 len, + u32 *response_buf, u32 response_buf_size) +{ + return guc->send(guc, action, len, response_buf, response_buf_size); } static inline void intel_guc_notify(struct intel_guc *guc) @@ -140,8 +148,10 @@ static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc, void intel_guc_fini_wq(struct intel_guc *guc); int intel_guc_init(struct intel_guc *guc); void intel_guc_fini(struct intel_guc *guc); -int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len); -int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len); +int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, + u32 *response_buf, u32 response_buf_size); +int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, + u32 *response_buf, u32 response_buf_size); void intel_guc_to_host_event_handler(struct intel_guc *guc); int intel_guc_sample_forcewake(struct intel_guc *guc); int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset); diff --git a/drivers/gpu/drm/i915/intel_guc_ct.c b/drivers/gpu/drm/i915/intel_guc_ct.c index fa52259..a54bf58 100644 --- a/drivers/gpu/drm/i915/intel_guc_ct.c +++ b/drivers/gpu/drm/i915/intel_guc_ct.c @@ -88,7 +88,7 @@ static int guc_action_register_ct_buffer(struct intel_guc *guc, int err; /* Can't use generic send(), CT registration must go over MMIO */ - err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action)); + err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action), NULL, 0); if (err) DRM_ERROR("CT: register %s buffer failed; err=%d\n", guc_ct_buffer_type_to_str(type), err); @@ -107,7 +107,7 @@ static int guc_action_deregister_ct_buffer(struct intel_guc *guc, int err; /* Can't use generic send(), CT deregistration must go over MMIO */ - err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action)); + err = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action), NULL, 0); if (err) DRM_ERROR("CT: deregister %s buffer failed; owner=%d err=%d\n", guc_ct_buffer_type_to_str(type), owner, err); @@ -408,7 +408,8 @@ static int ctch_send(struct intel_guc *guc, /* * Command Transport (CT) buffer based GuC send function. */ -static int intel_guc_send_ct(struct intel_guc *guc, const u32 *action, u32 len) +static int intel_guc_send_ct(struct intel_guc *guc, const u32 *action, u32 len, + u32 *response_buf, u32 response_buf_size) { struct intel_guc_ct_channel *ctch = &guc->ct.host_channel; u32 status = ~0; /* undefined */