From patchwork Thu Mar 29 13:05:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10315413 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7D21B60353 for ; Thu, 29 Mar 2018 13:05:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70BF92A345 for ; Thu, 29 Mar 2018 13:05:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 97BC42A348; Thu, 29 Mar 2018 13:05:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3E6362A36C for ; Thu, 29 Mar 2018 13:05:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8F31B6E2BE; Thu, 29 Mar 2018 13:05:41 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wr0-x243.google.com (mail-wr0-x243.google.com [IPv6:2a00:1450:400c:c0c::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id AF2F86E269 for ; Thu, 29 Mar 2018 13:05:39 +0000 (UTC) Received: by mail-wr0-x243.google.com with SMTP id m13so5344332wrj.5 for ; Thu, 29 Mar 2018 06:05:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=4zAVZyTx8jg/y58EvdVnDah77hoj3AcocVYxkC1nRrc=; b=O6LPI7yLt45VcdMxg8rK52XCBBeHDN/LH9SvkPCauWfQNdorLi7fRW2VgnRZ3Kux5z nkHFwLnWQfVzPvVC0aURSfA4EeousBam9/lXVs9VN8Swb6wncg1SXroNwYDqEtXZvL1U Gy1nxe1bgjZbZ1m2YZiDw9PpMfIRGMaSvpl82MZFEGryLb+Y/DZbF+sphWJpHRoRCaA1 /pu/SakeacZMQSi+EO1PBANoiIVJnsb0ZrEI2MHtTXut4XrW5HnUt8KYKo0Eht9H0nzQ Dxi7J1kdsLE+mrhReT4DHKvjy2YcNx9O56ROfDuads/6Ywh6ipV7yDFU2jBEsHjh4wKG Tw9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=4zAVZyTx8jg/y58EvdVnDah77hoj3AcocVYxkC1nRrc=; b=PfbxELsKLBxIQL91zc9WOrKfjuvJcbZ5yMZkqTyBHAgt5j8MqXi17wclZjqNu7TGnh g33+y0QbFx4YuRqXK99Tqacegi1If68xDdFXzxNdu0x0CM38QmmWSYxgOR71jXPgOYAh GFrCRyo7lUYozRwKBQuBUAJG+bx6PsPZ7vxQqKM/fZ1c0Gknq0M9SYrmwS0iacIlUcj6 TbgN+MZ2iDnR5rgHzSQ0RDs2wvI0sxmPrMxojTJN9vxIaoxCG9DMkCAByJqMvOjiFtXR 4iJ3FVPugK+3zcsQAujHpCwzgVd8IaJItCZCJPdAFDidfeDazGL9GrEIg+Xiw/e0ANkN Dujw== X-Gm-Message-State: AElRT7FwYBv9zTdVihkmMtNaRT9tlFT/57Ul9hCE3QylNeQ7BZ9TZbNa Ke8T9+StmQa/eXYnpQNYD50d3A== X-Google-Smtp-Source: AIpwx4/8vmx+yPjLcvbZOmyIk5TfN6ZWwfwiNHAGNVlzDbvMV7ABfU/Z3PbYzaL/hqr2ZCD9SEoSjw== X-Received: by 10.223.220.77 with SMTP id m13mr1788351wrj.274.1522328738104; Thu, 29 Mar 2018 06:05:38 -0700 (PDT) Received: from localhost.localdomain ([95.146.144.186]) by smtp.gmail.com with ESMTPSA id q21sm4504190wra.24.2018.03.29.06.05.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Mar 2018 06:05:37 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org Date: Thu, 29 Mar 2018 14:05:27 +0100 Message-Id: <20180329130528.8302-1-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.14.1 Subject: [Intel-gfx] [PATCH i-g-t v2 1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-gfx@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Contexts executing when reset triggers are potentialy corrupt so trying to use them from a subsequent test (like the default context) can hang the GPU or even the driver. Workaround that by always creating a dedicated context which will be running when GPU reset happens. v2: * Export and use gem_reopen_device so the test works on old gens as well. (Chris Wilson) Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson --- lib/i915/gem_submission.c | 11 +++++-- lib/i915/gem_submission.h | 2 ++ tests/gem_eio.c | 77 ++++++++++++++++++++++++++++++++--------------- 3 files changed, 64 insertions(+), 26 deletions(-) diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c index 7d3cbdbf8e77..2fd460d5ed2b 100644 --- a/lib/i915/gem_submission.c +++ b/lib/i915/gem_submission.c @@ -165,7 +165,14 @@ bool gem_has_guc_submission(int fd) return gem_submission_method(fd) & GEM_SUBMISSION_GUC; } -static int reopen_driver(int fd) +/** + * gem_reopen_driver: + * @fd: re-open the i915 drm file descriptor + * + * Re-opens the drm fd which is useful in instances where a clean default + * context is needed. + */ +int gem_reopen_driver(int fd) { char path[256]; @@ -201,7 +208,7 @@ void gem_test_engine(int i915, unsigned int engine) .buffer_count = 1, }; - i915 = reopen_driver(i915); + i915 = gem_reopen_driver(i915); igt_assert(!is_wedged(i915)); obj.handle = gem_create(i915, 4096); diff --git a/lib/i915/gem_submission.h b/lib/i915/gem_submission.h index 6b39a0532295..f94eabb201b4 100644 --- a/lib/i915/gem_submission.h +++ b/lib/i915/gem_submission.h @@ -35,4 +35,6 @@ bool gem_has_guc_submission(int fd); void gem_test_engine(int fd, unsigned int engine); +int gem_reopen_driver(int fd); + #endif /* GEM_SUBMISSION_H */ diff --git a/tests/gem_eio.c b/tests/gem_eio.c index b824d9d4c9c0..b7c5047f0816 100644 --- a/tests/gem_eio.c +++ b/tests/gem_eio.c @@ -255,6 +255,7 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait) { igt_spin_t *hang; + fd = gem_reopen_driver(fd); igt_require_gem(fd); /* @@ -276,10 +277,14 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait) igt_require(i915_reset_control(true)); trigger_reset(fd); + close(fd); } static void test_suspend(int fd, int state) { + fd = gem_reopen_driver(fd); + igt_require_gem(fd); + /* Do a suspend first so that we don't skip inside the test */ igt_system_suspend_autoresume(state, SUSPEND_TEST_DEVICES); @@ -291,27 +296,32 @@ static void test_suspend(int fd, int state) igt_require(i915_reset_control(true)); trigger_reset(fd); + close(fd); } static void test_inflight(int fd, unsigned int wait) { - const uint32_t bbe = MI_BATCH_BUFFER_END; - struct drm_i915_gem_exec_object2 obj[2]; + int parent_fd = fd; unsigned int engine; igt_require_gem(fd); igt_require(gem_has_exec_fence(fd)); - memset(obj, 0, sizeof(obj)); - obj[0].flags = EXEC_OBJECT_WRITE; - obj[1].handle = gem_create(fd, 4096); - gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); - - for_each_engine(fd, engine) { + for_each_engine(parent_fd, engine) { + const uint32_t bbe = MI_BATCH_BUFFER_END; + struct drm_i915_gem_exec_object2 obj[2]; struct drm_i915_gem_execbuffer2 execbuf; igt_spin_t *hang; int fence[64]; /* conservative estimate of ring size */ + fd = gem_reopen_driver(parent_fd); + igt_require_gem(fd); + + memset(obj, 0, sizeof(obj)); + obj[0].flags = EXEC_OBJECT_WRITE; + obj[1].handle = gem_create(fd, 4096); + gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); + gem_quiescent_gpu(fd); igt_debug("Starting %s on engine '%s'\n", __func__, e__->name); igt_require(i915_reset_control(false)); @@ -340,6 +350,9 @@ static void test_inflight(int fd, unsigned int wait) igt_spin_batch_free(fd, hang); igt_assert(i915_reset_control(true)); trigger_reset(fd); + + gem_close(fd, obj[1].handle); + close(fd); } } @@ -351,6 +364,7 @@ static void test_inflight_suspend(int fd) int fence[64]; /* conservative estimate of ring size */ igt_spin_t *hang; + fd = gem_reopen_driver(fd); igt_require_gem(fd); igt_require(gem_has_exec_fence(fd)); igt_require(i915_reset_control(false)); @@ -387,6 +401,7 @@ static void test_inflight_suspend(int fd) igt_spin_batch_free(fd, hang); igt_assert(i915_reset_control(true)); trigger_reset(fd); + close(fd); } static uint32_t context_create_safe(int i915) @@ -408,33 +423,37 @@ static uint32_t context_create_safe(int i915) static void test_inflight_contexts(int fd, unsigned int wait) { - struct drm_i915_gem_exec_object2 obj[2]; - const uint32_t bbe = MI_BATCH_BUFFER_END; + int parent_fd = fd; unsigned int engine; - uint32_t ctx[64]; igt_require_gem(fd); igt_require(gem_has_exec_fence(fd)); gem_require_contexts(fd); - for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++) - ctx[n] = context_create_safe(fd); - - memset(obj, 0, sizeof(obj)); - obj[0].flags = EXEC_OBJECT_WRITE; - obj[1].handle = gem_create(fd, 4096); - gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); - - for_each_engine(fd, engine) { + for_each_engine(parent_fd, engine) { + const uint32_t bbe = MI_BATCH_BUFFER_END; + struct drm_i915_gem_exec_object2 obj[2]; struct drm_i915_gem_execbuffer2 execbuf; igt_spin_t *hang; + uint32_t ctx[64]; int fence[64]; + fd = gem_reopen_driver(parent_fd); + igt_require_gem(fd); + + for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++) + ctx[n] = context_create_safe(fd); + gem_quiescent_gpu(fd); igt_debug("Starting %s on engine '%s'\n", __func__, e__->name); igt_require(i915_reset_control(false)); + memset(obj, 0, sizeof(obj)); + obj[0].flags = EXEC_OBJECT_WRITE; + obj[1].handle = gem_create(fd, 4096); + gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); + hang = spin_sync(fd, 0, engine); obj[0].handle = hang->handle; @@ -458,12 +477,15 @@ static void test_inflight_contexts(int fd, unsigned int wait) } igt_spin_batch_free(fd, hang); + gem_close(fd, obj[1].handle); igt_assert(i915_reset_control(true)); trigger_reset(fd); - } - for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++) - gem_context_destroy(fd, ctx[n]); + for (unsigned int n = 0; n < ARRAY_SIZE(ctx); n++) + gem_context_destroy(fd, ctx[n]); + + close(fd); + } } static void test_inflight_external(int fd) @@ -478,6 +500,9 @@ static void test_inflight_external(int fd) igt_require_sw_sync(); igt_require(gem_has_exec_fence(fd)); + fd = gem_reopen_driver(fd); + igt_require_gem(fd); + fence = igt_cork_plug(&cork, fd); igt_require(i915_reset_control(false)); @@ -514,6 +539,7 @@ static void test_inflight_external(int fd) igt_spin_batch_free(fd, hang); igt_assert(i915_reset_control(true)); trigger_reset(fd); + close(fd); } static void test_inflight_internal(int fd, unsigned int wait) @@ -525,9 +551,11 @@ static void test_inflight_internal(int fd, unsigned int wait) int fences[16]; igt_spin_t *hang; - igt_require_gem(fd); igt_require(gem_has_exec_fence(fd)); + fd = gem_reopen_driver(fd); + igt_require_gem(fd); + igt_require(i915_reset_control(false)); hang = spin_sync(fd, 0, 0); @@ -560,6 +588,7 @@ static void test_inflight_internal(int fd, unsigned int wait) igt_spin_batch_free(fd, hang); igt_assert(i915_reset_control(true)); trigger_reset(fd); + close(fd); } static int fd = -1;