@@ -1745,6 +1745,16 @@ static int gen9_init_render_ring(struct intel_engine_cs *engine)
return init_workarounds_ring(engine);
}
+static void tasklet_kill_and_disable(struct tasklet_struct *t)
+{
+ if (!atomic_read(&t->count))
+ tasklet_kill(t);
+
+ if (atomic_inc_return(&t->count) == 1)
+ tasklet_unlock_wait(t);
+ smp_mb();
+}
+
static struct i915_request *
execlists_reset_prepare(struct intel_engine_cs *engine)
{
@@ -1769,9 +1779,7 @@ execlists_reset_prepare(struct intel_engine_cs *engine)
* common case of recursively being called from set-wedged from inside
* i915_reset.
*/
- if (!atomic_read(&execlists->tasklet.count))
- tasklet_kill(&execlists->tasklet);
- tasklet_disable(&execlists->tasklet);
+ tasklet_kill_and_disable(&execlists->tasklet);
/*
* We want to flush the pending context switches, having disabled
Ideally, we want to atomically flush and disable the tasklet before resetting the GPU. At present, we rely on being the only part to touch our tasklet and serialisation of the reset process to ensure that we can suspend the tasklet from the mix of reset/wedge pathways. In this patch, we move the tasklet abuse into its own function and tweak it such that we only do a synchronous operation the first time it is disabled around the reset. This allows us to avoid the sync inside a softirq context in subsequent patches. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> CC: Michel Thierry <michel.thierry@intel.com> Cc: Jeff McGee <jeff.mcgee@intel.com> --- drivers/gpu/drm/i915/intel_lrc.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)