From patchwork Thu Apr 5 12:39:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10324523 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 700416053F for ; Thu, 5 Apr 2018 12:39:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 604CF29181 for ; Thu, 5 Apr 2018 12:39:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 54F7629184; Thu, 5 Apr 2018 12:39:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CFF5129181 for ; Thu, 5 Apr 2018 12:39:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B14B6E777; Thu, 5 Apr 2018 12:39:45 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4301F6E754 for ; Thu, 5 Apr 2018 12:39:35 +0000 (UTC) Received: by mail-wm0-x242.google.com with SMTP id f125so6625673wme.4 for ; Thu, 05 Apr 2018 05:39:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+bvwuZgGrXOC4rYiiGxQm/hn0HOMAL/BByeduy1g7uw=; b=uS+6aWW8pk74La+loJjj8mV4U4v/99KO34Z86DRk556DCVhl3L5A2f75H7dHe6z7Rm 0ZL2Hca26A8Pwk71qXv1SECWp6VHs941KPc4yG4J3Fy54IBSL01sVqMAB9aQbpQ2EV36 KBCRUy+xsTpITEPmE9UL5ipeFtPfGUOb2qDGy7jE8Q1sREJYgxDiNNMWIKiS4XeID94G 9m0babMco6/WVLaXh1h+d5GeiYBzQGIYfdzzEiB1G5LTBNfw3hRLpBdq9zYZo1AH9+Od oHBV8GbLMWx3Tzg5FsiIGZXSwrNVcS/yCOpnaolWTILBkAguzOtGPpoL9t4bEkmxoL+h +G3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+bvwuZgGrXOC4rYiiGxQm/hn0HOMAL/BByeduy1g7uw=; b=SgXUyZw7BniClDK6R72Kos3i3XK5Noyt2e7+NRErf9YaDl/LkK77C3XYbHCjUH/yjC mw6kLioM2OPA+oi8cKfcSF77JynpD5xkHp1xXtOMeGu9t8sHTKQ7xp9XVaziYMBzuIkv EicLdAKhb1BnFfK0SUK3cKb1gGya385LKVH9RKTftP7RwW5C1yVA9VHLHsslE8yit23b bI/erzrgXF8tv1up9o3MO1qstNSBaXdQvWg8rcYnt3GevBps69Hdu04dIN+Qk89JWMOP lR9DhVa+5GfIU0MempeBdj/u8eyXByGt2RhppK2WuLp14mLby5WBQ93vLjWzrIu2eOS3 Hpow== X-Gm-Message-State: ALQs6tAo6be6vGTQyDWHc5cD6yzK7VQpgQQsCjtAIhyfott4cpY+qK6m Vrry5blUnDHQnBRnGfFZB/os3bqH X-Google-Smtp-Source: AIpwx49yy+u5PDYh7pQuiDRhXZs0BgImXUj5hRYws5DaI7D5RG9KbrsrrpLVJAQTpvWZcubLaYimEA== X-Received: by 10.28.234.207 with SMTP id g76mr11367920wmi.149.1522931973554; Thu, 05 Apr 2018 05:39:33 -0700 (PDT) Received: from localhost.localdomain ([95.146.144.186]) by smtp.gmail.com with ESMTPSA id n21sm9800333wmi.37.2018.04.05.05.39.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Apr 2018 05:39:33 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Thu, 5 Apr 2018 13:39:17 +0100 Message-Id: <20180405123923.22671-2-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180405123923.22671-1-tvrtko.ursulin@linux.intel.com> References: <20180405123923.22671-1-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [PATCH 1/7] drm/i915/pmu: Fix enable count array size and bounds checking X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Enable count array is supposed to have one counter for each possible engine sampler. As such array sizing and bounds checking is not correct when more engine samplers are added. At the same time tidy the assert for readability and robustness. Signed-off-by: Tvrtko Ursulin Fixes: b46a33e271ed ("drm/i915/pmu: Expose a PMU interface for perf queries") Cc: Chris Wilson --- drivers/gpu/drm/i915/i915_pmu.c | 13 +++++++++---- drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index 11fb76bd3860..eb60943671b3 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -549,7 +549,8 @@ static void i915_pmu_enable(struct perf_event *event) * Update the bitmask of enabled events and increment * the event reference counter. */ - GEM_BUG_ON(bit >= I915_PMU_MASK_BITS); + BUILD_BUG_ON(ARRAY_SIZE(i915->pmu.enable_count) != I915_PMU_MASK_BITS); + GEM_BUG_ON(bit >= ARRAY_SIZE(i915->pmu.enable_count)); GEM_BUG_ON(i915->pmu.enable_count[bit] == ~0); i915->pmu.enable |= BIT_ULL(bit); i915->pmu.enable_count[bit]++; @@ -573,7 +574,10 @@ static void i915_pmu_enable(struct perf_event *event) GEM_BUG_ON(!engine); engine->pmu.enable |= BIT(sample); - GEM_BUG_ON(sample >= I915_PMU_SAMPLE_BITS); + BUILD_BUG_ON(ARRAY_SIZE(engine->pmu.enable_count) != + (1 << I915_PMU_SAMPLE_BITS)); + GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.enable_count)); + GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.sample)); GEM_BUG_ON(engine->pmu.enable_count[sample] == ~0); engine->pmu.enable_count[sample]++; } @@ -605,7 +609,8 @@ static void i915_pmu_disable(struct perf_event *event) engine_event_class(event), engine_event_instance(event)); GEM_BUG_ON(!engine); - GEM_BUG_ON(sample >= I915_PMU_SAMPLE_BITS); + GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.enable_count)); + GEM_BUG_ON(sample >= ARRAY_SIZE(engine->pmu.sample)); GEM_BUG_ON(engine->pmu.enable_count[sample] == 0); /* * Decrement the reference count and clear the enabled @@ -615,7 +620,7 @@ static void i915_pmu_disable(struct perf_event *event) engine->pmu.enable &= ~BIT(sample); } - GEM_BUG_ON(bit >= I915_PMU_MASK_BITS); + GEM_BUG_ON(bit >= ARRAY_SIZE(i915->pmu.enable_count)); GEM_BUG_ON(i915->pmu.enable_count[bit] == 0); /* * Decrement the reference count and clear the enabled diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 256d58487559..0c548c400699 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -391,7 +391,7 @@ struct intel_engine_cs { * * Index number corresponds to the bit number from @enable. */ - unsigned int enable_count[I915_PMU_SAMPLE_BITS]; + unsigned int enable_count[1 << I915_PMU_SAMPLE_BITS]; /** * @sample: Counter values for sampling events. *