@@ -568,6 +568,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
&execlists->port[execlists->port_mask];
struct i915_request *last = port_request(port);
struct rb_node *rb;
+ unsigned long flags;
bool submit = false;
/* Hardware submission is through 2 ports. Conceptually each port
@@ -591,7 +592,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
* and context switches) submission.
*/
- spin_lock_irq(&engine->timeline->lock);
+ spin_lock_irqsave(&engine->timeline->lock, flags);
rb = execlists->first;
GEM_BUG_ON(rb_first(&execlists->queue) != rb);
@@ -733,7 +734,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
GEM_BUG_ON(execlists->first && !port_isset(execlists->port));
unlock:
- spin_unlock_irq(&engine->timeline->lock);
+ spin_unlock_irqrestore(&engine->timeline->lock, flags);
if (submit) {
execlists_user_begin(execlists, execlists->port);
Prepare to allow the execlists submission to be run from underneath a hardirq timer context (and not just the current softirq context) as is required for fast preemption resets. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/intel_lrc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)