@@ -3155,8 +3155,9 @@ int i915_gem_object_wait(struct drm_i915_gem_object *obj,
struct intel_rps_client *rps);
int i915_gem_object_wait_priority(struct drm_i915_gem_object *obj,
unsigned int flags,
- int priority);
+ int priority, unsigned int timeout);
#define I915_PRIORITY_DISPLAY I915_PRIORITY_MAX
+#define I915_PREEMPTION_TIMEOUT_DISPLAY (100 * 1000 * 1000) /* 100 ms / 10Hz */
int __must_check
i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj, bool write);
@@ -563,7 +563,8 @@ i915_gem_object_wait_reservation(struct reservation_object *resv,
return timeout;
}
-static void __fence_set_priority(struct dma_fence *fence, int prio)
+static void __fence_set_priority(struct dma_fence *fence,
+ int prio, unsigned int timeout)
{
struct i915_request *rq;
struct intel_engine_cs *engine;
@@ -576,11 +577,12 @@ static void __fence_set_priority(struct dma_fence *fence, int prio)
rcu_read_lock();
if (engine->schedule)
- engine->schedule(rq, prio, 0);
+ engine->schedule(rq, prio, timeout);
rcu_read_unlock();
}
-static void fence_set_priority(struct dma_fence *fence, int prio)
+static void fence_set_priority(struct dma_fence *fence,
+ int prio, unsigned int timeout)
{
/* Recurse once into a fence-array */
if (dma_fence_is_array(fence)) {
@@ -588,16 +590,16 @@ static void fence_set_priority(struct dma_fence *fence, int prio)
int i;
for (i = 0; i < array->num_fences; i++)
- __fence_set_priority(array->fences[i], prio);
+ __fence_set_priority(array->fences[i], prio, timeout);
} else {
- __fence_set_priority(fence, prio);
+ __fence_set_priority(fence, prio, timeout);
}
}
int
i915_gem_object_wait_priority(struct drm_i915_gem_object *obj,
unsigned int flags,
- int prio)
+ int prio, unsigned int timeout)
{
struct dma_fence *excl;
@@ -612,7 +614,7 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object *obj,
return ret;
for (i = 0; i < count; i++) {
- fence_set_priority(shared[i], prio);
+ fence_set_priority(shared[i], prio, timeout);
dma_fence_put(shared[i]);
}
@@ -622,7 +624,7 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object *obj,
}
if (excl) {
- fence_set_priority(excl, prio);
+ fence_set_priority(excl, prio, timeout);
dma_fence_put(excl);
}
return 0;
@@ -12785,7 +12785,23 @@ intel_prepare_plane_fb(struct drm_plane *plane,
ret = intel_plane_pin_fb(to_intel_plane_state(new_state));
- i915_gem_object_wait_priority(obj, 0, I915_PRIORITY_DISPLAY);
+ /*
+ * Reschedule our dependencies, and ensure we run within a timeout.
+ *
+ * Note that if the timeout is exceeded, then whoever was running that
+ * prevented us from acquiring the GPU is declared rogue and reset. An
+ * unresponsive process will then be banned in order to preserve
+ * interactivity. Since this can be seen as a bit heavy-handed, we
+ * select a timeout for when the dropped frames start to become a
+ * noticeable nuisance for the user (100 ms, i.e. preemption was
+ * blocked for more than a few frames). Note, this is only a timeout
+ * for a delay in preempting the current request in order to run our
+ * dependency chain, our dependency chain may itself take a long time
+ * to run to completion before we can present the framebuffer.
+ */
+ i915_gem_object_wait_priority(obj, 0,
+ I915_PRIORITY_DISPLAY,
+ I915_PREEMPTION_TIMEOUT_DISPLAY);
mutex_unlock(&dev_priv->drm.struct_mutex);
i915_gem_object_unpin_pages(obj);
Use a liberal timeout of 20ms to ensure that the rendering for an interactive pageflip is started in a timely fashion, and that user interaction is not blocked by GPU, or CPU, hogs. This is at the cost of resetting whoever was blocking the preemption, likely leading to that context/process being banned from submitting future requests. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/i915_gem.c | 18 ++++++++++-------- drivers/gpu/drm/i915/intel_display.c | 18 +++++++++++++++++- 3 files changed, 29 insertions(+), 10 deletions(-)