| Message ID | 20180409124219.30699-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 09 Apr 2018 14:42:19 +0200, Chris Wilson <chris@chris-wilson.co.uk> wrote: > Our execlists emulation for GuC requires use of the breadcrumb following > every request as a simulcrum for the context-switch interrupt, which we > then use to drive the submission tasklet. Therefore, when we unpark the > engine for use with the GuC, we pin the breadcrumb interrupt to keep it > enabled for the duration. This has to be remain so across all resets, > wedging and resume, so check we do have the irq enabled when we start > submitting requests to the GuC and on all submissions thereafter. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Michał Winiarski <michal.winiarski@intel.com> > --- > drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c > b/drivers/gpu/drm/i915/intel_guc_submission.c > index 97121230656c..a7957b669b68 100644 > --- a/drivers/gpu/drm/i915/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/intel_guc_submission.c > @@ -758,6 +758,8 @@ static void guc_submission_tasklet(unsigned long > data) > struct execlist_port *port = execlists->port; > struct i915_request *rq; > + GEM_BUG_ON(!READ_ONCE(engine->breadcrumbs.irq_enabled)); > + > rq = port_request(port); > while (rq && i915_request_completed(rq)) { > trace_i915_request_out(rq); LGTM, but can you run this with GuC enabled ? Thanks, Michal
Quoting Michal Wajdeczko (2018-04-09 15:08:40) > On Mon, 09 Apr 2018 14:42:19 +0200, Chris Wilson > <chris@chris-wilson.co.uk> wrote: > > > Our execlists emulation for GuC requires use of the breadcrumb following > > every request as a simulcrum for the context-switch interrupt, which we > > then use to drive the submission tasklet. Therefore, when we unpark the > > engine for use with the GuC, we pin the breadcrumb interrupt to keep it > > enabled for the duration. This has to be remain so across all resets, > > wedging and resume, so check we do have the irq enabled when we start > > submitting requests to the GuC and on all submissions thereafter. > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > > Cc: Michał Winiarski <michal.winiarski@intel.com> > > --- > > drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c > > b/drivers/gpu/drm/i915/intel_guc_submission.c > > index 97121230656c..a7957b669b68 100644 > > --- a/drivers/gpu/drm/i915/intel_guc_submission.c > > +++ b/drivers/gpu/drm/i915/intel_guc_submission.c > > @@ -758,6 +758,8 @@ static void guc_submission_tasklet(unsigned long > > data) > > struct execlist_port *port = execlists->port; > > struct i915_request *rq; > > + GEM_BUG_ON(!READ_ONCE(engine->breadcrumbs.irq_enabled)); > > + > > rq = port_request(port); > > while (rq && i915_request_completed(rq)) { > > trace_i915_request_out(rq); > > LGTM, but can you run this with GuC enabled ? Are you afraid? If gem_eio isn't hitting this, I need to tweak gem_eio ;) -Chris
Quoting Chris Wilson (2018-04-09 15:49:22) > Quoting Michal Wajdeczko (2018-04-09 15:08:40) > > On Mon, 09 Apr 2018 14:42:19 +0200, Chris Wilson > > <chris@chris-wilson.co.uk> wrote: > > > > > Our execlists emulation for GuC requires use of the breadcrumb following > > > every request as a simulcrum for the context-switch interrupt, which we > > > then use to drive the submission tasklet. Therefore, when we unpark the > > > engine for use with the GuC, we pin the breadcrumb interrupt to keep it > > > enabled for the duration. This has to be remain so across all resets, > > > wedging and resume, so check we do have the irq enabled when we start > > > submitting requests to the GuC and on all submissions thereafter. > > > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > > > Cc: Michał Winiarski <michal.winiarski@intel.com> > > > --- > > > drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c > > > b/drivers/gpu/drm/i915/intel_guc_submission.c > > > index 97121230656c..a7957b669b68 100644 > > > --- a/drivers/gpu/drm/i915/intel_guc_submission.c > > > +++ b/drivers/gpu/drm/i915/intel_guc_submission.c > > > @@ -758,6 +758,8 @@ static void guc_submission_tasklet(unsigned long > > > data) > > > struct execlist_port *port = execlists->port; > > > struct i915_request *rq; > > > + GEM_BUG_ON(!READ_ONCE(engine->breadcrumbs.irq_enabled)); > > > + > > > rq = port_request(port); > > > while (rq && i915_request_completed(rq)) { > > > trace_i915_request_out(rq); > > > > LGTM, but can you run this with GuC enabled ? > > Are you afraid? If gem_eio isn't hitting this, I need to tweak gem_eio > ;) That run confirms that the existing test coverage is enough to hit this error - the same tests we know are broken atm due to the unbalance this is detecting. -Chris
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c index 97121230656c..a7957b669b68 100644 --- a/drivers/gpu/drm/i915/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/intel_guc_submission.c @@ -758,6 +758,8 @@ static void guc_submission_tasklet(unsigned long data) struct execlist_port *port = execlists->port; struct i915_request *rq; + GEM_BUG_ON(!READ_ONCE(engine->breadcrumbs.irq_enabled)); + rq = port_request(port); while (rq && i915_request_completed(rq)) { trace_i915_request_out(rq);
Our execlists emulation for GuC requires use of the breadcrumb following every request as a simulcrum for the context-switch interrupt, which we then use to drive the submission tasklet. Therefore, when we unpark the engine for use with the GuC, we pin the breadcrumb interrupt to keep it enabled for the duration. This has to be remain so across all resets, wedging and resume, so check we do have the irq enabled when we start submitting requests to the GuC and on all submissions thereafter. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> --- drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++ 1 file changed, 2 insertions(+)