From patchwork Mon Apr 9 16:37:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10331745 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EBC4160236 for ; Mon, 9 Apr 2018 16:38:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DDCB728619 for ; Mon, 9 Apr 2018 16:38:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D26C428686; Mon, 9 Apr 2018 16:38:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F220628619 for ; Mon, 9 Apr 2018 16:38:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 679BC6E0C3; Mon, 9 Apr 2018 16:37:49 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id CF3C56E0C3 for ; Mon, 9 Apr 2018 16:37:47 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id r82so18125119wme.0 for ; Mon, 09 Apr 2018 09:37:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ytyz2Dn6jFKkfzhe5MewutZfFGmq5UgV2VHIa9JG0vA=; b=unBYfEu6OzDpsv1waUi2wx4MnuVjQJYmDktlRmcCrHJ4k5qs5/gCdM2Jn4g8DskcFR ynukE++QPtlfznXdwwArQCBGTkmnohsWUXV7Who9fkm1bMMT2EnOTNHX767RqQgBymLz 4hwJSUIVaVwoR8jOJi9KBd1gILgHdplnlgHaqHMVYyMpZS/YtSgvt4eBbeDBqkYLLKMk iV8I4AmXlGf1X/XYTPkad6rWsWCZT0ib7jrIWMFmRZiHHDZrBTH4FXXH0kG3LglkZbED cjJy3mYICvZ+2k8XByC38MET/1irvTPSxMYxyNSjKPO5+CRZB+8Cq5753ezT7P/BBDME JyMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ytyz2Dn6jFKkfzhe5MewutZfFGmq5UgV2VHIa9JG0vA=; b=IZUDNdoEseCAl3W+NzRfzH+qpuNUJyZZFtuI7xJGaXfg6ZfAqrAPOSARAh1uhGTXM4 FkqntC+S1gdVdAgQVdA4cuuXZ/ncA5nUIHnXsSbo/o9xTRSLHZqPvrOqUKnJCPlyyI77 2NvsnqdlekoE5eyfdthaAP6f/mg6DK3Zau0QscK9Vk4KguSjODuV6G+6y6PiOmORjEQH H5VXQRhExOly3/epbJRGDgXRrL3PY7H8rlm0311tDTkrUdM+SRtWOLPy31qI3EHiNn+D Fxf2HAIJ81d5CgI5ejijDepjBlymCWWW3nJro7o+ik8j0AjIVaQYqmyBrrcJEQAoIc2n j54A== X-Gm-Message-State: ALQs6tD3c2kFomX+NJtxv14rgCOrBxtbleADNmG1xVmL7RL7XwLDWI4R 1so+c+u0MW1J+0O9qJkIIolWe3/Q X-Google-Smtp-Source: AIpwx489mnUvy7md9QZZJbTgq2RnkSzPa2P37hPUyTrfGn9fv9CChVzU4XKhmKEM34eRarBQvdh5SQ== X-Received: by 10.28.74.91 with SMTP id x88mr469912wma.53.1523291863166; Mon, 09 Apr 2018 09:37:43 -0700 (PDT) Received: from localhost.localdomain ([95.146.144.186]) by smtp.gmail.com with ESMTPSA id a62sm1284605wmh.5.2018.04.09.09.37.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 09 Apr 2018 09:37:42 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Mon, 9 Apr 2018 17:37:32 +0100 Message-Id: <20180409163732.14079-1-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180405123923.22671-3-tvrtko.ursulin@linux.intel.com> References: <20180405123923.22671-3-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [PATCH v10 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. We choose to mange the runnable counter at the backend level instead of at the request submit_notify callback. The latter would be more consolidated and less code, but it would require making the counter either atomic_t or taking the engine->timeline->lock in submit_notify. So the choice is to do it at the backend level for the benefit of fewer atomic instructions. v2: * Move queued increment from insert_request to execlist_submit_request to avoid bumping when re-ordering for priority. * Support the counter on the ringbuffer submission path as well, albeit just notionally. (Chris Wilson) v3: * Rebase. v4: * Rename and move the stats into a container structure. (Chris Wilson) v5: * Re-order fields in struct intel_engine_cs. (Chris Wilson) v6-v8: * Rebases. v9: * Fix accounting during wedging. v10: * Improved commit message. (Chris Wilson) Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem.c | 1 + drivers/gpu/drm/i915/i915_request.c | 7 +++++++ drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++-- drivers/gpu/drm/i915/intel_lrc.c | 1 + drivers/gpu/drm/i915/intel_ringbuffer.h | 9 +++++++++ 5 files changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 28ab0beff86c..aa8d19fac167 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3304,6 +3304,7 @@ static void nop_complete_submit_request(struct i915_request *request) dma_fence_set_error(&request->fence, -EIO); spin_lock_irqsave(&request->engine->timeline->lock, flags); + request->engine->request_stats.runnable++; __i915_request_submit(request); intel_engine_init_global_seqno(request->engine, request->global_seqno); spin_unlock_irqrestore(&request->engine->timeline->lock, flags); diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c index 9ca9c24b4421..2617bd008845 100644 --- a/drivers/gpu/drm/i915/i915_request.c +++ b/drivers/gpu/drm/i915/i915_request.c @@ -494,6 +494,9 @@ void __i915_request_submit(struct i915_request *request) /* Transfer from per-context onto the global per-engine timeline */ move_to_timeline(request, engine->timeline); + GEM_BUG_ON(engine->request_stats.runnable == 0); + engine->request_stats.runnable--; + trace_i915_request_execute(request); wake_up_all(&request->execute); @@ -507,6 +510,8 @@ void i915_request_submit(struct i915_request *request) /* Will be called from irq-context when using foreign fences. */ spin_lock_irqsave(&engine->timeline->lock, flags); + engine->request_stats.runnable++; + __i915_request_submit(request); spin_unlock_irqrestore(&engine->timeline->lock, flags); @@ -545,6 +550,8 @@ void __i915_request_unsubmit(struct i915_request *request) /* Transfer back from the global per-engine timeline to per-context */ move_to_timeline(request, request->timeline); + engine->request_stats.runnable++; + /* * We don't need to wake_up any waiters on request->execute, they * will get woken by any other event or us re-adding this request diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index 12486d8f534b..98254ff92785 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -1934,12 +1934,13 @@ void intel_engine_dump(struct intel_engine_cs *engine, if (i915_terminally_wedged(&engine->i915->gpu_error)) drm_printf(m, "*** WEDGED ***\n"); - drm_printf(m, "\tcurrent seqno %x, last %x, hangcheck %x [%d ms], inflight %d\n", + drm_printf(m, "\tcurrent seqno %x, last %x, hangcheck %x [%d ms], inflight %d, runnable %u\n", intel_engine_get_seqno(engine), intel_engine_last_submit(engine), engine->hangcheck.seqno, jiffies_to_msecs(jiffies - engine->hangcheck.action_timestamp), - engine->timeline->inflight_seqnos); + engine->timeline->inflight_seqnos, + engine->request_stats.runnable); drm_printf(m, "\tReset count: %d (global %d)\n", i915_reset_engine_count(error, engine), i915_reset_count(error)); diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 02b25bf2378a..16ea95ff7c51 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1124,6 +1124,7 @@ static void execlists_submit_request(struct i915_request *request) queue_request(engine, &request->priotree, rq_prio(request)); submit_queue(engine, rq_prio(request)); + engine->request_stats.runnable++; GEM_BUG_ON(!engine->execlists.first); GEM_BUG_ON(list_empty(&request->priotree.link)); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 0c548c400699..54d2ad1c8daa 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -338,6 +338,15 @@ struct intel_engine_cs { struct drm_i915_gem_object *default_state; + struct { + /** + * @runnable: Number of runnable requests sent to the backend. + * + * Count of requests waiting for the GPU to execute them. + */ + unsigned int runnable; + } request_stats; + atomic_t irq_count; unsigned long irq_posted; #define ENGINE_IRQ_BREADCRUMB 0