From patchwork Wed Apr 11 08:27:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Musial, Ewelina" X-Patchwork-Id: 10335067 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 54F8760134 for ; Wed, 11 Apr 2018 08:28:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4325D2878C for ; Wed, 11 Apr 2018 08:28:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37DBC2878F; Wed, 11 Apr 2018 08:28:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id ACBD72878C for ; Wed, 11 Apr 2018 08:28:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F3FFA6E575; Wed, 11 Apr 2018 08:28:44 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 717E06E575; Wed, 11 Apr 2018 08:28:43 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Apr 2018 01:28:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,435,1517904000"; d="scan'208";a="31213363" Received: from emusial-desk.igk.intel.com ([172.28.172.62]) by fmsmga007.fm.intel.com with ESMTP; 11 Apr 2018 01:28:41 -0700 From: Ewelina Musial To: intel-gfx@lists.freedesktop.org Date: Wed, 11 Apr 2018 10:27:12 +0200 Message-Id: <20180411082713.15959-1-ewelina.musial@intel.com> X-Mailer: git-send-email 2.14.3 Subject: [Intel-gfx] [PATCH] selftests/i915_gem_gtt: Create igt_ggtt_scratch subtest X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: igt-dev@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Test have similar functionality that gem_cs_prefetch IGT test but gem_cs_prefetch is not up to date and there was an idea to move this test to kselftests so this is respond for this request. There is another patch on igt_dev which is removing gem_cs_prefetch test from IGT. --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 134 ++++++++++++++++++++++++++ 1 file changed, 134 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index 89b6ca9b14a7..42403da610c6 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -1625,6 +1625,139 @@ static int igt_gtt_insert(void *arg) return err; } +#define COUNT 10 +static int igt_ggtt_scratch(void *arg) +{ + static struct insert_mode { + const char *name; + enum drm_mm_insert_mode mode; + } modes[] = { + { "bottom-up", DRM_MM_INSERT_LOW }, + { "top-down", DRM_MM_INSERT_HIGH }, + {} + }; + + I915_RND_STATE(prng); + + struct insert_mode *mode; + struct drm_i915_private *i915 = arg; + struct i915_ggtt *ggtt = &i915->ggtt; + struct drm_i915_gem_object *obj; + struct drm_mm_node *node; + struct drm_mm_node tmp[COUNT]; + unsigned int *order; + int err = 0; + int n, m; + u64 hole_start, hole_end = 0; + u64 offset; + u32 __iomem *vaddr; + u32 val; + + mutex_lock(&i915->drm.struct_mutex); + + for (mode = modes; mode->name; mode++) { + order = i915_random_order(COUNT, &prng); + if (!order) { + err = -ENOMEM; + } + + obj = i915_gem_object_create_internal(i915, PAGE_SIZE); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + goto out_unlock; + } + + drm_mm_for_each_hole(node, &ggtt->base.mm, hole_start, hole_end) { + + err = i915_gem_object_pin_pages(obj); + if (err) + goto out_free; + + intel_runtime_pm_get(i915); + for (m = 0; m < COUNT; m++) { + memset(&tmp[order[m]], 0, sizeof(tmp[order[m]])); + + err = drm_mm_insert_node_in_range(&ggtt->base.mm, &tmp[order[m]], + 3 * PAGE_SIZE, 0, + I915_COLOR_UNEVICTABLE, + 0, ggtt->mappable_end, + mode->mode); + if (err) + goto out_unpin; + + offset = tmp[order[m]].start; + ggtt->base.insert_page(&ggtt->base, + i915_gem_object_get_dma_address(obj, 0), + offset + PAGE_SIZE, I915_CACHE_NONE, 0); + } + + i915_random_reorder(order, COUNT, &prng); + + for (m = 0; m < COUNT; m++) { + for ( n = 0; n <= 2; n++) + { + offset = tmp[order[m]].start + n * PAGE_SIZE; + vaddr = io_mapping_map_atomic_wc(&ggtt->iomap, offset); + iowrite32(n, vaddr); + io_mapping_unmap_atomic(vaddr); + } + + i915_gem_flush_ggtt_writes(i915); + + for ( n = 0; n <= 2; n++) + { + offset = tmp[order[m]].start + n * PAGE_SIZE; + vaddr = io_mapping_map_atomic_wc(&ggtt->iomap, offset); + val = ioread32(vaddr); + io_mapping_unmap_atomic(vaddr); + + if ((n != 1) && (val != 2)) { + pr_err("insert page failed: found %d, expected %d\n", + val, 2); + err = -EINVAL; + break; + } else if ((n == 1) && (val != n)) { + pr_err("insert page failed: found %d, expected %d\n", + val, n); + err = -EINVAL; + break; + } + } + + ggtt->base.clear_range(&ggtt->base, tmp[order[m]].start, tmp[order[m]].size); + ggtt->invalidate(i915); + + for ( n = 0; n <= 2; n++) + { + offset = tmp[order[m]].start + n * PAGE_SIZE; + vaddr = io_mapping_map_atomic_wc(&ggtt->iomap, offset); + val = ioread32(vaddr); + io_mapping_unmap_atomic(vaddr); + + if (val != 2) { + pr_err("insert page failed: found %d, expected %d\n", + val, 2); + err = -EINVAL; + break; + } + } + } + for (m = 0; m < COUNT; m++) { + drm_mm_remove_node(&tmp[m]); + } +out_unpin: + intel_runtime_pm_put(i915); + i915_gem_object_unpin_pages(obj); + } +out_free: + i915_gem_object_put(obj); + kfree(order); + } +out_unlock: + mutex_unlock(&i915->drm.struct_mutex); + return err; +} + int i915_gem_gtt_mock_selftests(void) { static const struct i915_subtest tests[] = { @@ -1667,6 +1800,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_ggtt_pot), SUBTEST(igt_ggtt_fill), SUBTEST(igt_ggtt_page), + SUBTEST(igt_ggtt_scratch), }; GEM_BUG_ON(offset_in_page(i915->ggtt.base.total));