From patchwork Fri Apr 27 23:12:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 10369993 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CFCF1601BE for ; Fri, 27 Apr 2018 23:12:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BEAD52950D for ; Fri, 27 Apr 2018 23:12:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B36AF2952B; Fri, 27 Apr 2018 23:12:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4F3B32950D for ; Fri, 27 Apr 2018 23:12:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F0B36E022; Fri, 27 Apr 2018 23:12:13 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 353046E022 for ; Fri, 27 Apr 2018 23:12:11 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Apr 2018 16:12:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,336,1520924400"; d="scan'208";a="54260749" Received: from przanoni-mobl.amr.corp.intel.com (HELO przanoni-mobl.jf.intel.com) ([10.24.11.83]) by orsmga002.jf.intel.com with ESMTP; 27 Apr 2018 16:12:11 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Apr 2018 16:12:08 -0700 Message-Id: <20180427231208.9092-1-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.14.3 Subject: [Intel-gfx] [PATCH] drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arthur J Runyan , Paulo Zanoni MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP For all platforms that run haswell_crtc_enable, our spec tells us to configure the transcoder clocks before it tells us to set pipeconf and the other pipe/transcoder/plane registers. For some reason we've been able to get away with doing what we were doing until now, but starting from Icelake, we get machine hangs if we try to touch the pipe/transcoder registers without having the clocks configured. So this patch changes all the relevant platforms to call intel_ddi_enable_pipe_clock at the point we're supposed to, according to the spec. It seems there is a way to work around this problem on ICL with some chicken bit, but I still couldn't find which one it is, and it's better if we just do the right thing here. Cc: Arthur J Runyan Cc: James Ausmus Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) Luckily our CI system should be in a spot where it is able to tell us whether this patch is good with high confidence. I haven't tested it on every affected platform. diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 48576ea2d36c..c93aed2ec16d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5578,8 +5578,11 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, &intel_crtc->config->fdi_m_n, NULL); } - if (!transcoder_is_dsi(cpu_transcoder)) + if (!transcoder_is_dsi(cpu_transcoder)) { + intel_ddi_enable_pipe_clock(pipe_config); + haswell_set_pipeconf(crtc); + } haswell_set_pipemisc(crtc); @@ -5589,9 +5592,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, intel_encoders_pre_enable(crtc, pipe_config, old_state); - if (!transcoder_is_dsi(cpu_transcoder)) - intel_ddi_enable_pipe_clock(pipe_config); - /* Display WA #1180: WaDisableScalarClockGating: glk, cnl */ psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) && intel_crtc->config->pch_pfit.enabled;