From patchwork Thu May 3 06:37:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10377165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CDF33603B4 for ; Thu, 3 May 2018 06:39:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BE1C4251F9 for ; Thu, 3 May 2018 06:39:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B304A28E2B; Thu, 3 May 2018 06:39:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4A3C1251F9 for ; Thu, 3 May 2018 06:39:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 38BA96E6AC; Thu, 3 May 2018 06:39:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4904A6E6A5 for ; Thu, 3 May 2018 06:38:57 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 11578254-1500050 for multiple; Thu, 03 May 2018 07:38:50 +0100 Received: by haswell.alporthouse.com (sSMTP sendmail emulation); Thu, 03 May 2018 07:38:49 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 3 May 2018 07:37:09 +0100 Message-Id: <20180503063757.22238-23-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180503063757.22238-1-chris@chris-wilson.co.uk> References: <20180503063757.22238-1-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.65.138 X-Country: code=GB country="United Kingdom" ip=78.156.65.138 Subject: [Intel-gfx] [PATCH 23/71] drm/i915: Use a preemption timeout to enforce interactivity X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Use a liberal timeout of 20ms to ensure that the rendering for an interactive pageflip is started in a timely fashion, and that user interaction is not blocked by GPU, or CPU, hogs. This is at the cost of resetting whoever was blocking the preemption, likely leading to that context/process being banned from submitting future requests. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 4 +++- drivers/gpu/drm/i915/i915_gem.c | 19 +++++++++++-------- drivers/gpu/drm/i915/intel_display.c | 17 ++++++++++++++++- 3 files changed, 30 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9341b725113b..1fed1a90b25e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3167,8 +3167,10 @@ int i915_gem_object_wait(struct drm_i915_gem_object *obj, struct intel_rps_client *rps); int i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, unsigned int flags, - const struct i915_sched_attr *attr); + const struct i915_sched_attr *attr, + unsigned int timeout); #define I915_PRIORITY_DISPLAY I915_PRIORITY_MAX +#define I915_PREEMPTION_TIMEOUT_DISPLAY (100 * 1000 * 1000) /* 100 ms / 10Hz */ int __must_check i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj, bool write); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 4986c4f1ecf9..344e3d98acd5 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -567,7 +567,8 @@ i915_gem_object_wait_reservation(struct reservation_object *resv, } static void __fence_set_priority(struct dma_fence *fence, - const struct i915_sched_attr *attr) + const struct i915_sched_attr *attr, + unsigned int timeout) { struct i915_request *rq; struct intel_engine_cs *engine; @@ -580,12 +581,13 @@ static void __fence_set_priority(struct dma_fence *fence, local_bh_disable(); /* RCU serialisation for set-wedged protection */ if (engine->schedule) - engine->schedule(rq, attr, 0); + engine->schedule(rq, attr, timeout); local_bh_enable(); /* kick the tasklets if queues were reprioritised */ } static void fence_set_priority(struct dma_fence *fence, - const struct i915_sched_attr *attr) + const struct i915_sched_attr *attr, + unsigned int timeout) { /* Recurse once into a fence-array */ if (dma_fence_is_array(fence)) { @@ -593,16 +595,17 @@ static void fence_set_priority(struct dma_fence *fence, int i; for (i = 0; i < array->num_fences; i++) - __fence_set_priority(array->fences[i], attr); + __fence_set_priority(array->fences[i], attr, timeout); } else { - __fence_set_priority(fence, attr); + __fence_set_priority(fence, attr, timeout); } } int i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, unsigned int flags, - const struct i915_sched_attr *attr) + const struct i915_sched_attr *attr, + unsigned int timeout) { struct dma_fence *excl; @@ -617,7 +620,7 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, return ret; for (i = 0; i < count; i++) { - fence_set_priority(shared[i], attr); + fence_set_priority(shared[i], attr, timeout); dma_fence_put(shared[i]); } @@ -627,7 +630,7 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, } if (excl) { - fence_set_priority(excl, attr); + fence_set_priority(excl, attr, timeout); dma_fence_put(excl); } return 0; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1087358f6364..d230be4bd587 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12797,7 +12797,8 @@ static void fb_obj_bump_render_priority(struct drm_i915_gem_object *obj) .priority = I915_PRIORITY_DISPLAY, }; - i915_gem_object_wait_priority(obj, 0, &attr); + i915_gem_object_wait_priority(obj, 0, + &attr, I915_PREEMPTION_TIMEOUT_DISPLAY); } /** @@ -12876,6 +12877,20 @@ intel_prepare_plane_fb(struct drm_plane *plane, ret = intel_plane_pin_fb(to_intel_plane_state(new_state)); + /* + * Reschedule our dependencies, and ensure we run within a timeout. + * + * Note that if the timeout is exceeded, then whoever was running that + * prevented us from acquiring the GPU is declared rogue and reset. An + * unresponsive process will then be banned in order to preserve + * interactivity. Since this can be seen as a bit heavy-handed, we + * select a timeout for when the dropped frames start to become a + * noticeable nuisance for the user (100 ms, i.e. preemption was + * blocked for more than a few frames). Note, this is only a timeout + * for a delay in preempting the current request in order to run our + * dependency chain, our dependency chain may itself take a long time + * to run to completion before we can present the framebuffer. + */ fb_obj_bump_render_priority(obj); mutex_unlock(&dev_priv->drm.struct_mutex);