From patchwork Mon May 7 16:52:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 10384509 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DEA3860318 for ; Mon, 7 May 2018 16:52:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A17DD28825 for ; Mon, 7 May 2018 16:52:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 95D6A28864; Mon, 7 May 2018 16:52:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0E10628825 for ; Mon, 7 May 2018 16:52:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D03E6E424; Mon, 7 May 2018 16:52:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 238546E362 for ; Mon, 7 May 2018 16:52:38 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 May 2018 09:52:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,374,1520924400"; d="scan'208";a="226533080" Received: from rosetta.fi.intel.com ([10.237.72.186]) by fmsmga006.fm.intel.com with ESMTP; 07 May 2018 09:52:36 -0700 Received: by rosetta.fi.intel.com (Postfix, from userid 1000) id 8A87184075B; Mon, 7 May 2018 19:52:26 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Mon, 7 May 2018 19:52:22 +0300 Message-Id: <20180507165222.17009-5-mika.kuoppala@linux.intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180507165222.17009-1-mika.kuoppala@linux.intel.com> References: <20180507165222.17009-1-mika.kuoppala@linux.intel.com> Subject: [Intel-gfx] [PATCH 5/5] drm/i915/gtt: Trust the uncached store to flush wcb X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Not all architectures guarantee that uncached read will flush the write combining buffer. So marking it explicitly is recommended [1]. However we know the architecture we are operating on and can avoid wmb as the UC store will flush the wcb [2]. Omit the wmb() on gen6_ppgtt_invalidate as redundant. References: http://yarchive.net/comp/linux/write_combining.html [1] References: http://download.intel.com/design/PentiumII/applnots/24442201.pdf [2] Cc: Chris Wilson Cc: Matthew Auld Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index dcac8bd604ab..ef2727f4b6a6 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -125,10 +125,7 @@ static void gen6_ppgtt_invalidate(struct i915_address_space * const vm) static void gen6_ggtt_invalidate(struct drm_i915_private *dev_priv) { - /* Flush write combining buffer */ - wmb(); - - /* Note that as an uncached mmio write, this should flush the + /* Note that as an uncached mmio write, this will flush the * WCB of the writes into the GGTT before it triggers the invalidate. */ I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);