@@ -1437,6 +1437,8 @@ void intel_engine_dump(struct intel_engine_cs *engine,
hexdump(m, engine->status_page.page_addr, PAGE_SIZE);
drm_printf(m, "Idle? %s\n", yesno(intel_engine_is_idle(engine)));
+
+ drm_printf(m, "Powergating transitions: %u\n", atomic_read(&engine->sseu_transitions));
}
static u8 user_class_map[] = {
@@ -540,6 +540,7 @@ static void maybe_enable_noa_repgoram(struct i915_request *rq)
*cs++ = i915_ggtt_offset(stream->noa_reprogram_vma);
engine->last_sseu = ce->sseu;
+ atomic_inc(&engine->sseu_transitions);
}
static void port_assign(struct execlist_port *port, struct i915_request *rq)
@@ -526,6 +526,7 @@ static int init_ring_common(struct intel_engine_cs *engine)
I915_WRITE_MODE(engine, _MASKED_BIT_DISABLE(STOP_RING));
memset(&engine->last_sseu, 0, sizeof(engine->last_sseu));
+ atomic_set(&engine->sseu_transitions, 0);
out:
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
@@ -344,6 +344,7 @@ struct intel_engine_cs {
struct drm_i915_gem_object *default_state;
union i915_gem_sseu last_sseu;
+ atomic_t sseu_transitions;
atomic_t irq_count;
unsigned long irq_posted;
This can be used to monitor the number of powergating transition changes for a particular workload. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> --- drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++ drivers/gpu/drm/i915/intel_lrc.c | 1 + drivers/gpu/drm/i915/intel_ringbuffer.c | 1 + drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + 4 files changed, 5 insertions(+)