From patchwork Thu May 17 06:03:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10405379 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3E76660353 for ; Thu, 17 May 2018 06:09:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E4462893D for ; Thu, 17 May 2018 06:09:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 232182894D; Thu, 17 May 2018 06:09:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7955C2893D for ; Thu, 17 May 2018 06:09:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4541D6E61C; Thu, 17 May 2018 06:09:11 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id 907A86E5F7 for ; Thu, 17 May 2018 06:08:38 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 11730251-1500050 for multiple; Thu, 17 May 2018 07:08:25 +0100 Received: by haswell.alporthouse.com (sSMTP sendmail emulation); Thu, 17 May 2018 07:08:24 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 17 May 2018 07:03:37 +0100 Message-Id: <20180517060738.19193-21-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180517060738.19193-1-chris@chris-wilson.co.uk> References: <20180517060738.19193-1-chris@chris-wilson.co.uk> MIME-Version: 1.0 X-Originating-IP: 78.156.65.138 X-Country: code=GB country="United Kingdom" ip=78.156.65.138 Subject: [Intel-gfx] [PATCH 021/262] drm/i915/execlists: Try preempt-reset from hardirq timer context X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP When circumstances allow, trying resetting the engine directly from the preemption timeout handler. As this is softirq context, we have to be careful both not to sleep and not to spin on anything we may be interrupting (e.g. the submission tasklet). Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Michał Winiarski CC: Michel Thierry Cc: Jeff McGee Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_lrc.c | 34 ++++++- drivers/gpu/drm/i915/selftests/intel_lrc.c | 111 +++++++++++++++++++++ 2 files changed, 144 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 9b015ec236a3..b6f369d06bb8 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -563,6 +563,37 @@ static void inject_preempt_context(struct intel_engine_cs *engine) execlists_set_active(execlists, EXECLISTS_ACTIVE_PREEMPT); } +static int try_preempt_reset(struct intel_engine_execlists *execlists) +{ + struct tasklet_struct * const t = &execlists->tasklet; + int err = -EBUSY; + + if (tasklet_trylock(t)) { + struct intel_engine_cs *engine = + container_of(execlists, typeof(*engine), execlists); + const unsigned int bit = I915_RESET_ENGINE + engine->id; + unsigned long *lock = &engine->i915->gpu_error.flags; + + t->func(t->data); + if (!execlists_is_active(execlists, + EXECLISTS_ACTIVE_PREEMPT_TIMEOUT)) { + /* Nothing to do; the tasklet was just delayed. */ + err = 0; + } else if (!test_and_set_bit(bit, lock)) { + tasklet_disable_nosync(t); + err = i915_reset_engine(engine, "preemption time out"); + tasklet_enable(t); + + clear_bit(bit, lock); + wake_up_bit(lock, bit); + } + + tasklet_unlock(t); + } + + return err; +} + static enum hrtimer_restart preempt_timeout(struct hrtimer *hrtimer) { struct intel_engine_execlists *execlists = @@ -585,7 +616,8 @@ static enum hrtimer_restart preempt_timeout(struct hrtimer *hrtimer) intel_engine_dump(engine, &p, "%s\n", engine->name); } - queue_work(system_highpri_wq, &execlists->preempt_reset); + if (try_preempt_reset(execlists)) + queue_work(system_highpri_wq, &execlists->preempt_reset); return HRTIMER_NORESTART; } diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c index 7409c582b478..40c1f6951444 100644 --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c @@ -508,6 +508,116 @@ static int live_preempt_timeout(void *arg) return err; } +static void __softirq_begin(void) +{ + local_bh_disable(); +} + +static void __softirq_end(void) +{ + local_bh_enable(); +} + +static void __hardirq_begin(void) +{ + local_irq_disable(); +} + +static void __hardirq_end(void) +{ + local_irq_enable(); +} + +static int live_preempt_reset(void *arg) +{ + struct drm_i915_private *i915 = arg; + struct intel_engine_cs *engine; + struct i915_gem_context *ctx; + enum intel_engine_id id; + struct spinner spin; + int err = -ENOMEM; + + if (!HAS_LOGICAL_RING_PREEMPTION(i915)) + return 0; + + mutex_lock(&i915->drm.struct_mutex); + + if (spinner_init(&spin, i915)) + goto err_unlock; + + ctx = kernel_context(i915); + if (!ctx) + goto err_spin; + + for_each_engine(engine, i915, id) { + static const struct { + const char *name; + void (*critical_section_begin)(void); + void (*critical_section_end)(void); + } phases[] = { + { "softirq", __softirq_begin, __softirq_end }, + { "hardirq", __hardirq_begin, __hardirq_end }, + { } + }; + struct tasklet_struct *t = &engine->execlists.tasklet; + const typeof(*phases) *p; + + for (p = phases; p->name; p++) { + struct i915_request *rq; + + rq = spinner_create_request(&spin, ctx, engine, + MI_NOOP); + if (IS_ERR(rq)) { + err = PTR_ERR(rq); + goto err_ctx; + } + + i915_request_add(rq); + if (!wait_for_spinner(&spin, rq)) { + i915_gem_set_wedged(i915); + err = -EIO; + goto err_ctx; + } + + /* Flush to give try_preempt_reset a chance */ + tasklet_schedule(t); + tasklet_kill(t); + GEM_BUG_ON(i915_request_completed(rq)); + + GEM_TRACE("%s triggering %s reset\n", + engine->name, p->name); + p->critical_section_begin(); + + mark_preemption_hang(&engine->execlists); + err = try_preempt_reset(&engine->execlists); + + p->critical_section_end(); + if (err) { + pr_err("Preempt softirq reset failed on %s, tasklet state %lx\n", + engine->name, t->state); + spinner_end(&spin); + i915_gem_set_wedged(i915); + goto err_ctx; + } + + if (igt_flush_test(i915, I915_WAIT_LOCKED)) { + err = -EIO; + goto err_ctx; + } + } + } + + err = 0; +err_ctx: + kernel_context_close(ctx); +err_spin: + spinner_fini(&spin); +err_unlock: + igt_flush_test(i915, I915_WAIT_LOCKED); + mutex_unlock(&i915->drm.struct_mutex); + return err; +} + int intel_execlists_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { @@ -515,6 +625,7 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915) SUBTEST(live_preempt), SUBTEST(live_late_preempt), SUBTEST(live_preempt_timeout), + SUBTEST(live_preempt_reset), }; if (!HAS_EXECLISTS(i915))