From patchwork Thu May 17 06:03:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10405381 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E509D60353 for ; Thu, 17 May 2018 06:09:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D2D882894D for ; Thu, 17 May 2018 06:09:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C489928957; Thu, 17 May 2018 06:09:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 52A802894D for ; Thu, 17 May 2018 06:09:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 900336E625; Thu, 17 May 2018 06:09:15 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6594F6E624 for ; Thu, 17 May 2018 06:09:14 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 11730290-1500050 for multiple; Thu, 17 May 2018 07:09:09 +0100 Received: by haswell.alporthouse.com (sSMTP sendmail emulation); Thu, 17 May 2018 07:09:07 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 17 May 2018 07:03:56 +0100 Message-Id: <20180517060738.19193-40-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180517060738.19193-1-chris@chris-wilson.co.uk> References: <20180517060738.19193-1-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.65.138 X-Country: code=GB country="United Kingdom" ip=78.156.65.138 Subject: [Intel-gfx] [PATCH 040/262] drm/i915: Merge sandybridge_pcode_(read|write) X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP These routines are identical except in the nature of the value parameter. For writes it is a pure in-param, but for a read, we need an out-param. Since they differ in a single line, merge the two routines into one. Signed-off-by: Chris Wilson Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/intel_pm.c | 114 +++++++++++--------------------- 1 file changed, 40 insertions(+), 74 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 3b8b4b43dc49..cfd5ac1876a2 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -9346,12 +9346,10 @@ void intel_init_pm(struct drm_i915_private *dev_priv) } } -static inline int gen6_check_mailbox_status(struct drm_i915_private *dev_priv) +static inline int gen6_check_mailbox_status(struct drm_i915_private *dev_priv, + u32 mbox) { - uint32_t flags = - I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_ERROR_MASK; - - switch (flags) { + switch (mbox & GEN6_PCODE_ERROR_MASK) { case GEN6_PCODE_SUCCESS: return 0; case GEN6_PCODE_UNIMPLEMENTED_CMD: @@ -9364,17 +9362,15 @@ static inline int gen6_check_mailbox_status(struct drm_i915_private *dev_priv) case GEN6_PCODE_TIMEOUT: return -ETIMEDOUT; default: - MISSING_CASE(flags); + MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK); return 0; } } -static inline int gen7_check_mailbox_status(struct drm_i915_private *dev_priv) +static inline int gen7_check_mailbox_status(struct drm_i915_private *dev_priv, + u32 mbox) { - uint32_t flags = - I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_ERROR_MASK; - - switch (flags) { + switch (mbox & GEN6_PCODE_ERROR_MASK) { case GEN6_PCODE_SUCCESS: return 0; case GEN6_PCODE_ILLEGAL_CMD: @@ -9386,18 +9382,21 @@ static inline int gen7_check_mailbox_status(struct drm_i915_private *dev_priv) case GEN7_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE: return -EOVERFLOW; default: - MISSING_CASE(flags); + MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK); return 0; } } -static int __sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val) +static int __sandybridge_pcode_rw(struct drm_i915_private *dev_priv, + u32 mbox, u32 *val, + int fast_timeout_us, + int slow_timeout_ms, + bool is_read) { - int status; - lockdep_assert_held(&dev_priv->sb_lock); - /* GEN6_PCODE_* are outside of the forcewake domain, we can + /* + * GEN6_PCODE_* are outside of the forcewake domain, we can * use te fw I915_READ variants to reduce the amount of work * required when reading/writing. */ @@ -9411,69 +9410,36 @@ static int __sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, if (__intel_wait_for_register_fw(dev_priv, GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0, - 500, 0, NULL)) + fast_timeout_us, + slow_timeout_ms, + &mbox)) return -ETIMEDOUT; - *val = I915_READ_FW(GEN6_PCODE_DATA); - I915_WRITE_FW(GEN6_PCODE_DATA, 0); + if (is_read) + *val = I915_READ_FW(GEN6_PCODE_DATA); if (INTEL_GEN(dev_priv) > 6) - status = gen7_check_mailbox_status(dev_priv); + return gen7_check_mailbox_status(dev_priv, mbox); else - status = gen6_check_mailbox_status(dev_priv); - - return status; + return gen6_check_mailbox_status(dev_priv, mbox); } int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val) { - int status; + int err; mutex_lock(&dev_priv->sb_lock); - status = __sandybridge_pcode_read(dev_priv, mbox, val); + err = __sandybridge_pcode_rw(dev_priv, mbox, val, + 500, 0, + true); mutex_unlock(&dev_priv->sb_lock); - if (status) { + if (err) { DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n", - mbox, __builtin_return_address(0), status); + mbox, __builtin_return_address(0), err); } - return status; -} - -static int __sandybridge_pcode_write_timeout(struct drm_i915_private *dev_priv, - u32 mbox, u32 val, - int fast_timeout_us, - int slow_timeout_ms) -{ - int status; - - /* GEN6_PCODE_* are outside of the forcewake domain, we can - * use te fw I915_READ variants to reduce the amount of work - * required when reading/writing. - */ - - if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) - return -EAGAIN; - - I915_WRITE_FW(GEN6_PCODE_DATA, val); - I915_WRITE_FW(GEN6_PCODE_DATA1, 0); - I915_WRITE_FW(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox); - - if (__intel_wait_for_register_fw(dev_priv, - GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0, - fast_timeout_us, slow_timeout_ms, - NULL)) - return -ETIMEDOUT; - - I915_WRITE_FW(GEN6_PCODE_DATA, 0); - - if (INTEL_GEN(dev_priv) > 6) - status = gen7_check_mailbox_status(dev_priv); - else - status = gen6_check_mailbox_status(dev_priv); - - return status; + return err; } int sandybridge_pcode_write_timeout(struct drm_i915_private *dev_priv, @@ -9481,31 +9447,31 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *dev_priv, int fast_timeout_us, int slow_timeout_ms) { - int status; + int err; mutex_lock(&dev_priv->sb_lock); - status = __sandybridge_pcode_write_timeout(dev_priv, mbox, val, - fast_timeout_us, - slow_timeout_ms); + err = __sandybridge_pcode_rw(dev_priv, mbox, &val, + fast_timeout_us, slow_timeout_ms, + false); mutex_unlock(&dev_priv->sb_lock); - if (status) { + if (err) { DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n", - val, mbox, __builtin_return_address(0), status); + val, mbox, __builtin_return_address(0), err); } - return status; + return err; } static bool skl_pcode_try_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request, u32 reply_mask, u32 reply, u32 *status) { - u32 val = request; - - *status = __sandybridge_pcode_read(dev_priv, mbox, &val); + *status = __sandybridge_pcode_rw(dev_priv, mbox, &request, + 500, 0, + true); - return *status || ((val & reply_mask) == reply); + return *status || ((request & reply_mask) == reply); } /**