From patchwork Tue May 22 11:00:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10418001 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C76886053B for ; Tue, 22 May 2018 11:01:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B72EB28BDA for ; Tue, 22 May 2018 11:01:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ABFD028BE8; Tue, 22 May 2018 11:01:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 508D628BDA for ; Tue, 22 May 2018 11:01:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F7DB6E287; Tue, 22 May 2018 11:00:59 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id B19E96E283; Tue, 22 May 2018 11:00:55 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 11789062-1500050 for multiple; Tue, 22 May 2018 12:00:48 +0100 Received: by haswell.alporthouse.com (sSMTP sendmail emulation); Tue, 22 May 2018 12:00:50 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 22 May 2018 12:00:44 +0100 Message-Id: <20180522110044.26439-3-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180522110044.26439-1-chris@chris-wilson.co.uk> References: <20180522110044.26439-1-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.65.138 X-Country: code=GB country="United Kingdom" ip=78.156.65.138 Subject: [Intel-gfx] [PATCH i-g-t 3/3] benchmarks/gem_syslatency: Specify batch duration X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: igt-dev@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP While for stressing the system we want to submit as many batches as we can as that shows us worst case impact on system latency, it is not a very realistic case. To introduce a bit more realism allow the batches run for a user defined duration. Signed-off-by: Chris Wilson --- benchmarks/gem_syslatency.c | 71 ++++++++++++++++++++++++++++++++++--- 1 file changed, 67 insertions(+), 4 deletions(-) diff --git a/benchmarks/gem_syslatency.c b/benchmarks/gem_syslatency.c index d1056773a..45cabe86c 100644 --- a/benchmarks/gem_syslatency.c +++ b/benchmarks/gem_syslatency.c @@ -51,6 +51,7 @@ static volatile int done; struct gem_busyspin { pthread_t thread; + unsigned long sz; unsigned long count; bool leak; bool interrupts; @@ -96,7 +97,8 @@ static void *gem_busyspin(void *arg) struct gem_busyspin *bs = arg; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj[2]; - const unsigned sz = bs->leak ? 16 << 20 : 4 << 10; + const unsigned sz = + bs->sz ? bs->sz + sizeof(bbe) : bs->leak ? 16 << 20 : 4 << 10; unsigned engines[16]; unsigned nengine; unsigned engine; @@ -112,7 +114,7 @@ static void *gem_busyspin(void *arg) obj[0].handle = gem_create(fd, 4096); obj[0].flags = EXEC_OBJECT_WRITE; obj[1].handle = gem_create(fd, sz); - gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); + gem_write(fd, obj[1].handle, bs->sz, &bbe, sizeof(bbe)); memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)(obj + !bs->interrupts); @@ -125,6 +127,12 @@ static void *gem_busyspin(void *arg) } while (!done) { + for (int n = 0; n < nengine; n++) { + const int m = rand() % nengine; + unsigned int tmp = engines[n]; + engines[n] = engines[m]; + engines[m] = tmp; + } for (int n = 0; n < nengine; n++) { execbuf.flags &= ~ENGINE_FLAGS; execbuf.flags |= engines[n]; @@ -134,7 +142,7 @@ static void *gem_busyspin(void *arg) if (bs->leak) { gem_madvise(fd, obj[1].handle, I915_MADV_DONTNEED); obj[1].handle = gem_create(fd, sz); - gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe)); + gem_write(fd, obj[1].handle, bs->sz, &bbe, sizeof(bbe)); } } @@ -294,6 +302,50 @@ static void *background_fs(void *path) return NULL; } +static unsigned long calibrate_nop(unsigned int target_us, + unsigned int tolerance_pct) +{ + const uint32_t bbe = MI_BATCH_BUFFER_END; + const unsigned int loops = 100; + struct drm_i915_gem_exec_object2 obj = {}; + struct drm_i915_gem_execbuffer2 eb = + { .buffer_count = 1, .buffers_ptr = (uintptr_t)&obj}; + struct timespec t_0, t_end; + long sz, prev; + int fd; + + fd = drm_open_driver(DRIVER_INTEL); + + clock_gettime(CLOCK_MONOTONIC, &t_0); + + sz = 256 * 1024; + do { + struct timespec t_start; + + obj.handle = gem_create(fd, sz + sizeof(bbe)); + gem_write(fd, obj.handle, sz, &bbe, sizeof(bbe)); + gem_execbuf(fd, &eb); + gem_sync(fd, obj.handle); + + clock_gettime(CLOCK_MONOTONIC, &t_start); + for (int loop = 0; loop < loops; loop++) + gem_execbuf(fd, &eb); + gem_sync(fd, obj.handle); + clock_gettime(CLOCK_MONOTONIC, &t_end); + + gem_close(fd, obj.handle); + + prev = sz; + sz = loops * sz / elapsed(&t_start, &t_end) * 1e3 * target_us; + sz = ALIGN(sz, sizeof(uint32_t)); + } while (elapsed(&t_0, &t_end) < 5 || + abs(sz - prev) > (sz * tolerance_pct / 100)); + + close(fd); + + return sz; +} + int main(int argc, char **argv) { struct gem_busyspin *busy; @@ -309,9 +361,10 @@ int main(int argc, char **argv) int enable_gem_sysbusy = 1; bool leak = false; bool interrupts = false; + long batch = 0; int n, c; - while ((c = getopt(argc, argv, "t:f:bmni1")) != -1) { + while ((c = getopt(argc, argv, "r:t:f:bmni1")) != -1) { switch (c) { case '1': ncpus = 1; @@ -328,6 +381,10 @@ int main(int argc, char **argv) if (time < 0) time = INT_MAX; break; + case 'r': + /* Duration of each batch (microseconds) */ + batch = atoi(optarg); + break; case 'f': /* Select an output field */ field = atoi(optarg); @@ -350,11 +407,17 @@ int main(int argc, char **argv) force_low_latency(); min = min_measurement_error(); + if (batch > 0) + batch = calibrate_nop(batch, 2); + else + batch = -batch; + busy = calloc(ncpus, sizeof(*busy)); pthread_attr_init(&attr); if (enable_gem_sysbusy) { for (n = 0; n < ncpus; n++) { bind_cpu(&attr, n); + busy[n].sz = batch; busy[n].leak = leak; busy[n].interrupts = interrupts; pthread_create(&busy[n].thread, &attr,