From patchwork Tue May 22 12:30:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10418603 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5D0F16032A for ; Tue, 22 May 2018 12:31:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C87728B61 for ; Tue, 22 May 2018 12:31:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 418A228B7B; Tue, 22 May 2018 12:31:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D3C1A28B61 for ; Tue, 22 May 2018 12:31:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 21D596E11F; Tue, 22 May 2018 12:31:06 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 836086E145 for ; Tue, 22 May 2018 12:30:32 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id f8-v6so33117989wmc.4 for ; Tue, 22 May 2018 05:30:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ptFmtlzs+yh3vS0Ol8Z/XdFykuapQ7gYUU2vsVQCfyY=; b=kpwvUF8an4fPmkl4SI4N0cmzMItqApgpxM6wZDCk74q+Ii8v3ZRjUuDqbdGx7OR1x+ jpwNLn0jkd5v1FFS3n3OPJMEpm+4REM4kWK+KHosI2s+aPd1U9+t6kLR0YSLVehtFAzg qFg2TPEuV0LbBFqzTv+8+/Ushmw5Ysh4eSOAxq9uT562ZpOkVTb0nFe/J3c3uhqCpEGn zu6EXHCj10nK+BqbXliZLLPXX5Ubi6ggREjLAid+v/g2qfs81ss8V8yf2YHO5sou44Zu LrRdO8NgipRGBAMV1JG+gGPBKWyhxRnEH7jzHDqsPfs2/XoNEcvEMU5Pr3PUQqxe2Lbg H7fQ== X-Gm-Message-State: ALKqPwe+W//q9U5tOBQyPDLAd1cght7PQG+JYNobD6VCfeoHY0i62sTO XV7GgHKd646LKwzB+Z9EvgO6KE1L X-Google-Smtp-Source: AB8JxZp2UPGj5FOxdiF/scRNINm6sCHqS3MfX2sQXBPz3nFJPGybCzXoiBthXKxDunVpDswqrbk7Ew== X-Received: by 2002:a1c:57c6:: with SMTP id l189-v6mr1082520wmb.161.1526992230747; Tue, 22 May 2018 05:30:30 -0700 (PDT) Received: from localhost.localdomain ([95.146.151.144]) by smtp.gmail.com with ESMTPSA id z63-v6sm22822227wrb.34.2018.05.22.05.30.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 May 2018 05:30:30 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Tue, 22 May 2018 13:30:14 +0100 Message-Id: <20180522123020.31624-5-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180522123020.31624-1-tvrtko.ursulin@linux.intel.com> References: <20180522123020.31624-1-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [RFC 04/10] drm/i915: Move intel_engine_context_in/out into intel_lrc.c X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Intel_lrc.c is the only caller and so to avoid some header file ordering issues in future patches move these two over there. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_lrc.c | 57 +++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_ringbuffer.h | 55 ------------------------ 2 files changed, 57 insertions(+), 55 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 8480c1534c4b..3947bdcd8ea6 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -375,6 +375,63 @@ execlists_context_status_change(struct i915_request *rq, unsigned long status) status, rq); } +static inline void +intel_engine_context_in(struct intel_engine_cs *engine) +{ + unsigned long flags; + + if (READ_ONCE(engine->stats.enabled) == 0) + return; + + write_seqlock_irqsave(&engine->stats.lock, flags); + + if (engine->stats.enabled > 0) { + if (engine->stats.active++ == 0) + engine->stats.start = ktime_get(); + GEM_BUG_ON(engine->stats.active == 0); + } + + write_sequnlock_irqrestore(&engine->stats.lock, flags); +} + +static inline void +intel_engine_context_out(struct intel_engine_cs *engine) +{ + unsigned long flags; + + if (READ_ONCE(engine->stats.enabled) == 0) + return; + + write_seqlock_irqsave(&engine->stats.lock, flags); + + if (engine->stats.enabled > 0) { + ktime_t last; + + if (engine->stats.active && --engine->stats.active == 0) { + /* + * Decrement the active context count and in case GPU + * is now idle add up to the running total. + */ + last = ktime_sub(ktime_get(), engine->stats.start); + + engine->stats.total = ktime_add(engine->stats.total, + last); + } else if (engine->stats.active == 0) { + /* + * After turning on engine stats, context out might be + * the first event in which case we account from the + * time stats gathering was turned on. + */ + last = ktime_sub(ktime_get(), engine->stats.enabled_at); + + engine->stats.total = ktime_add(engine->stats.total, + last); + } + } + + write_sequnlock_irqrestore(&engine->stats.lock, flags); +} + inline void execlists_user_begin(struct intel_engine_execlists *execlists, const struct execlist_port *port) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 7c25db5bcaaa..1bdc42deca3c 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -1091,61 +1091,6 @@ void intel_engine_dump(struct intel_engine_cs *engine, struct intel_engine_cs * intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance); -static inline void intel_engine_context_in(struct intel_engine_cs *engine) -{ - unsigned long flags; - - if (READ_ONCE(engine->stats.enabled) == 0) - return; - - write_seqlock_irqsave(&engine->stats.lock, flags); - - if (engine->stats.enabled > 0) { - if (engine->stats.active++ == 0) - engine->stats.start = ktime_get(); - GEM_BUG_ON(engine->stats.active == 0); - } - - write_sequnlock_irqrestore(&engine->stats.lock, flags); -} - -static inline void intel_engine_context_out(struct intel_engine_cs *engine) -{ - unsigned long flags; - - if (READ_ONCE(engine->stats.enabled) == 0) - return; - - write_seqlock_irqsave(&engine->stats.lock, flags); - - if (engine->stats.enabled > 0) { - ktime_t last; - - if (engine->stats.active && --engine->stats.active == 0) { - /* - * Decrement the active context count and in case GPU - * is now idle add up to the running total. - */ - last = ktime_sub(ktime_get(), engine->stats.start); - - engine->stats.total = ktime_add(engine->stats.total, - last); - } else if (engine->stats.active == 0) { - /* - * After turning on engine stats, context out might be - * the first event in which case we account from the - * time stats gathering was turned on. - */ - last = ktime_sub(ktime_get(), engine->stats.enabled_at); - - engine->stats.total = ktime_add(engine->stats.total, - last); - } - } - - write_sequnlock_irqrestore(&engine->stats.lock, flags); -} - int intel_enable_engine_stats(struct intel_engine_cs *engine); void intel_disable_engine_stats(struct intel_engine_cs *engine);